The pinmux for G4 still does not follow the document.
And what is the result of ls -l /sys/class/mdio_bus/ now?
raycon@raycon-desktop:~$ ls -l /sys/class/mdio_bus/
total 0
lrwxrwxrwx 1 root root 0 Feb 20 13:24 fixed-0 → ‘../../devices/platform/Fixed MDIO bus.0/mdio_bus/fixed-0’
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請你直接確認你之前附上的pinmux dtsi跟文件的內容就可以了. 這兩個的格式是一模一樣的. 我的意思是你應該要以pinmux dtsi為主 而不是一直看excel.
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請照我們文件上的檢查項目做檢查
1. The read PHY ID should use the mdio tool to ensure that PHY is out of the reset mode.
2. Ensure that the PHY driver is available.
3. Ensure that the PIN mux settings are correct in the RGMII interface.
4. Ensure that PHY comes out of reset and supplies the Rx clock to EQOS.
等interrupt pinmux改完之後應該2,3應該就正確了. 項目 1,4 得請你們確認
我们实际使用的pinmux.dtsi中关于MDC/MDIO的设置
eqos_sma_mdio_pf4 {
nvidia,pins = "eqos_sma_mdio_pf4";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
eqos_sma_mdc_pf5 {
nvidia,pins = "eqos_sma_mdc_pf5";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
修改了tegra234-p3737-0000+p3701-0005-nv.dts的内容，增加了
/* RayCon EQOS RGMII diagnostic override */
&{/bus@0/ethernet@6800000} {
status = “disabled”;
};
&{/bus@0/ethernet@2310000} {
status = “okay”;
nvidia,instance_id = <4>;
nvidia,mac-addr-idx = <0>;
nvidia,mdio_addr = <1>;
phy-mode = “rgmii-id”;
/delete-property/ fixed-link;
// PHYRSTB is active low: assert for at least 10 ms, then wait 72 ms.
nvidia,phy-reset-gpio = <&gpio TEGRA234_MAIN_GPIO(G, 5) 0>;
phy-handle = <&custom_rgmii_phy>;
mdio {
compatible = "nvidia,eqos-mdio";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
custom_rgmii_phy: phy@1 {
compatible = "realtek,rtl8211f";
status = "okay";
reg = <1>;
nvidia,phy-rst-duration-usec = <10000>;
nvidia,phy-rst-pdelay-msec = <72>;
/delete-property/ reset-gpios;
/delete-property/ reset-assert-us;
/delete-property/ reset-deassert-us;
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(G, 4)
IRQ_TYPE_LEVEL_LOW>;
};
};
};
是否还有遗漏
raycon@raycon-desktop:~/phytool$ sudo phytool read eth0/1/2
error: phy_read (-22)
raycon@raycon-desktop:~/phytool$ [ 7365.556880] nvethernet 2310000.ethernet: ether_ioctl: Interface not up
請你要確認dts都直接使用/proc/device-tree底下的內容做確認
你這些dts原檔到底有沒有成功燒進去, 燒進去之後有沒有符合你的預期只有透過/proc/device-tree才有辦法準確判斷.
常常有用戶改了幾十行之後覺得自己都對了結果燒進去根本沒出現.
而且你改完後要給完整的dmesg. 沒有人真的知道你那邊機器的狀況是怎樣. 這些log都是需要的資訊.
提醒一下. forum是可以檔案附件的.
要貼超過10行以上的內容的時候請用附件而不是複製貼上…
好的，了解，不过以上信息是否足够
請附上文件檔
dmesg.txt (60.2 KB)
running.dts.txt (322.2 KB)
[ 13.660903] mdio_bus 2310000.ethernet: MDIO device at address 1 is missing.
你確定你們硬體設計上 PHY是在mdio address 1嗎?
phy@1 {
nvidia,phy-rst-duration-usec = <0x4e20>;
interrupts = <0x34 0x08>;
interrupt-parent = <0xf1>;
compatible = "ethernet-phy-ieee802.3-c22";
status = "okay";
reg = <0x01>;
phandle = <0x126>;
nvidia,phy-rst-pdelay-msec = <0x64>;
};
另外還有為什麼compatible沒有使用Realtek PHY driver?
是这样的，原先的dts配置中，我们使用的是
compatible = “realtek,rtl8211f”;，但是我们发现MDC没有正常输出
于是我们修改了
compatible = “ethernet-phy-ieee802.3-c22”; 这个时候MDC正常输出了，但是PHY没有正常反馈MDIO，同时增加了mdio_bus 2310000.ethernet: MDIO device at address 1 is missing.这条报错
了解. 目前看來的方向比較正確
能否確認 PHY address strap 真的是 1還有RESET 是否已保持 high？
另外在現在的情況下 sudo phytool read eth0/1/2有辦法讀出結果嗎?
想確認一下
/sys/kernel/debug/gpio
PG.05的GPIO 有被寫成phy reset嗎?
然後eth0 up的時候該GPIO的讀取結果(/sys/kernel/debug/gpio )有變嗎?
我们去掉了硬件复位，并吧GPIO reset做了强制拉高，网络可以使用了，相关配置参考如下。这种现象可能和什么有关系呢？
&{/bus@0/ethernet@2310000} {
status = “okay”;
nvidia,instance_id = <4>;
nvidia,mac-addr-idx = <0>;
nvidia,mdio_addr = <1>;
phy-mode = “rgmii-id”;
/delete-property/ fixed-link;
phy-handle = <&custom_rgmii_phy>;
mdio {
compatible = "nvidia,eqos-mdio";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
custom_rgmii_phy: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
status = "okay";
reg = <0x01>;
nvidia,phy-rst-duration-usec = <10000>;
nvidia,phy-rst-pdelay-msec = <80>;
/delete-property/ reset-gpios;
/delete-property/ reset-assert-us;
/delete-property/ reset-deassert-us;
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(G, 4)
IRQ_TYPE_LEVEL_LOW>;
};
};
};
/* Hold PHYRSTB (PG.05) high: PHY must not be hardware-reset. */
&gpio {
phy-reset-hold-high {
gpio-hog;
gpios = <TEGRA234_MAIN_GPIO(G, 5) GPIO_ACTIVE_HIGH>;
output-high;
};
};
聽起來是本來reset GPIO的timing跟你們PHY需要的時間沒有搭上?