MDIO and MDC doesn't work

Seven0 · November 10, 2023, 7:48am

The kernel loading process MDIO and MDC has no waveform.
gpio-388 (PG.05 |phy_reset ) out lo
It’s supposed to output high, but it’s low when I turn it on.
this is my log
log.txt (114.3 KB)

eth_0:ethernet@2310000 {
status = “okay”;
nvidia,skip_phy_start = <1>;
nvidia,mac-addr-idx = <0>;
nvidia,max-platform-mtu = <8000>;
/* 0=enable, 1=disable */
nvidia,pause_frames = <1>;
//xavier & orin: H5
nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G, 5) 1>;
//phy-handle = <&switch0port6>;
phy-mode = “rgmii”;

	mdio {
		compatible = "nvidia,eqos-mdio";
		#address-cells = <1>;
		#size-cells = <0>;

		switch0: switch0@0 {
			compatible = "marvell,mv88e6352","marvell,mv88e6085";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;

			dsa,member = <0 0>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					label = "lan0";
				};

				port@1 {
					reg = <1>;
					label = "lan1";
				};

				port@2 {
					reg = <2>;
					label = "lan2";
				};

				port@3 {
					reg = <3>;
					label = "lan3";
				};


				switch0port5: port@5 {
					reg = <5>;
					label = "dsa";
					//phy-mode = "rgmii-txid";
					link = <&switch1port5>;
					fixed-link {
						speed = <1000>;
						full-duplex;
					};
				};


				switch0port6:port@6 {
					reg = <6>;
					label = "cpu";
					ethernet = <&eth_0>;
					//xavier & orin: J5
					//interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
					interrupt-parent = <&tegra_main_gpio>;
					interrupts = <TEGRA234_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
					phy-mode = "rgmii";
					fixed-link {
						speed = <1000>;
						full-duplex;
					};
				};
			};
		};


        	switch1: switch1@0 {
			compatible = "marvell,mv88e6352","marvell,mv88e6085";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <4>;

			dsa,member = <0 1>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					label = "lan5";
				};

				port@1 {
					reg = <1>;
					label = "lan6";
				};

				port@2 {
					reg = <2>;
					label = "lan7";
				};

				port@3 {
					reg = <3>;
					label = "lan8";
				};

				switch1port5: port@5 {
					reg = <5>;
					label = "dsa";
					//phy-mode = "rgmii-txid";
					link = <&switch0port5>;
					fixed-link {
						speed = <1000>;
						full-duplex;
					};
				};
			};
    		};
	};
};

this is my device tree.

eqos_txc_pe0 {
nvidia,pins = “eqos_txc_pe0”;
nvidia,function = “eqos”;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};

		eqos_td0_pe1 {
			nvidia,pins = "eqos_td0_pe1";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_td1_pe2 {
			nvidia,pins = "eqos_td1_pe2";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_td2_pe3 {
			nvidia,pins = "eqos_td2_pe3";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_td3_pe4 {
			nvidia,pins = "eqos_td3_pe4";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_tx_ctl_pe5 {
			nvidia,pins = "eqos_tx_ctl_pe5";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_rd0_pe6 {
			nvidia,pins = "eqos_rd0_pe6";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rd1_pe7 {
			nvidia,pins = "eqos_rd1_pe7";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rd2_pf0 {
			nvidia,pins = "eqos_rd2_pf0";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rd3_pf1 {
			nvidia,pins = "eqos_rd3_pf1";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rx_ctl_pf2 {
			nvidia,pins = "eqos_rx_ctl_pf2";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rxc_pf3 {
			nvidia,pins = "eqos_rxc_pf3";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_sma_mdio_pf4 {
			nvidia,pins = "eqos_sma_mdio_pf4";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_sma_mdc_pf5 {
			nvidia,pins = "eqos_sma_mdc_pf5";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};
		soc_gpio17_pg4 {
			nvidia,pins = "soc_gpio17_pg4";
			nvidia,function = "rsvd0";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			nvidia,lpdr = <TEGRA_PIN_DISABLE>;
		};

		soc_gpio18_pg5 {
			nvidia,pins = "soc_gpio18_pg5";
			nvidia,function = "rsvd0";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			nvidia,lpdr = <TEGRA_PIN_DISABLE>;
		};

I have configured these pins

KevinFFF · November 10, 2023, 9:13am

Hi Seven0,

Are you using the devkit or custom board for AGX Orin?
What’s your Jetpack version in use?

Could you describe what’t your use case?
and also the block diagram of your connections so that we would know what you should configure with.

Seven0 · November 10, 2023, 9:18am

Hi KevinFFF,
I use custom board,Jetpack 5.1.2.

this is my block diagram of connections

Seven0 · November 10, 2023, 9:43am

2023-11-10 17-42-45 的屏幕截图

KevinFFF · November 13, 2023, 7:35am

Is this you current issue that PG.05 is low rather than high?

If so, please try configuring 1 to 0 in following line.

Seven0 · November 13, 2023, 8:01am

The problem now is that the Ethernet failed to load，

ifconfig no have eth0,ifconfig -a eth0 device is displayed,

nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G, 5) 1>;

Whether this pin is set to 0 or 1,gpio-388 always output low.
I load the nvethernet driver manually, mdio and mdc don’t have any waveforms.
But there will be a waveform at boot time, either in uefi stage or before, this won’t happen in jetpack5.0.2

WayneWWW · November 13, 2023, 8:25am

Why did you mention jetpack5.0.2? Is this working on jp5.0.2 but not new BSP?

Seven0 · November 13, 2023, 8:36am

之前我们使用jetpack5.0.2，现在升级到jetpck5.1.2，这个问题之前使用jetpack5.0.2没有出现过，MDIO和
MDC在加载驱动的时候没有波形

WayneWWW · November 13, 2023, 8:38am

Hi,

software 部份應該是沒有太大的差異. 比較懷疑的是你們的pinmux設定會不會沒燒進去
因為jp5.0.2用的pinmux dtsi跟jp5.1.0/1.1/1.2的會不一樣.

Seven0 · November 13, 2023, 8:47am

titan@titan:~/Desktop$ sudo busybox devmem 0x02445048
[sudo] password for titan:
0x00002400
titan@titan:~/Desktop$ sudo busybox devmem 0x02445038
0x00002440
titan@titan:~/Desktop$ sudo busybox devmem 0x02445070
0x00002458
titan@titan:~/Desktop$ sudo busybox devmem 0x02445020
0x00002458
titan@titan:~/Desktop$ sudo busybox devmem 0x02445028
0x00002458
titan@titan:~/Desktop$ sudo busybox devmem 0x02445030
0x00002458
titan@titan:~/Desktop$ sudo busybox devmem 0x02445040
0x00002458
titan@titan:~/Desktop$ sudo busybox devmem 0x02445060
0x00002458
titan@titan:~/Desktop$ sudo busybox devmem 0x02445068
0x00002400
titan@titan:~/Desktop$ sudo busybox devmem 0x02445000
0x00002400
titan@titan:~/Desktop$ sudo busybox devmem 0x02445008
0x00002400
titan@titan:~/Desktop$ sudo busybox devmem 0x02445010
0x00002400
titan@titan:~/Desktop$ sudo busybox devmem 0x02445018
0x00002400
titan@titan:~/Desktop$
titan@titan:~/Desktop$ sudo busybox devmem 0x02445058
0x00002400

我检查过端口复用的寄存器，没有问题，修改Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi再读取会看到值改变了，所以我认为是烧进去了，我是在jetpack5.1.2的tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi里面按照Jetson AGX Orin Platform Adaptation and Bring-Up — Jetson Linux Developer Guide documentation 这个文档改动的

WayneWWW · November 13, 2023, 8:54am

有完整的dmesg能確認嗎

Seven0 · November 13, 2023, 8:56am

log.txt (52.1 KB)

WayneWWW · November 13, 2023, 8:58am

好像貼錯log了…?

Seven0 · November 13, 2023, 9:15am

uart.log (18.6 KB)
这个是刷机时串口log
flash.log (88.1 KB)
这个是刷机时命令行输出
都是只进行到烧写app的时候，后面烧写会很慢，之前刷机忘记保存log了，抱歉

WayneWWW · November 13, 2023, 9:16am

厄…我是要跟你拿dmesg (kernel log)

Seven0 · November 13, 2023, 9:24am

demsg.log (113.3 KB)

Seven0 · November 14, 2023, 11:39am

你好，这个问题现在有进展吗

WayneWWW · November 14, 2023, 12:12pm

請你把rel-35.1的kernel log, dts 還有現在這版的dts也附上

Seven0 · November 14, 2023, 12:27pm

35.1_dts.log (471.3 KB)
35.4_dts.log (482.9 KB)
dmesg_35.1.log (134.5 KB)

Seven0 · November 15, 2023, 9:59am

你好，可以看出一些问题吗

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MDIO and MDC doesn't work

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