TX2-4g R32.3.1 Failed at I2S0_RX sw reset

[terrysu50z]

Looks like tegra210_i2s_alt.c is trying to do a i2s reset and it fails.

Working on codec tlv320aic3100, followed bmanyu thread and it appears to be trying to use the codec but it is failing,

sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep dap1
[sudo] password for tbuckley:
Bank: 0 Reg: 0x02431028 Val: 0x00000400 → dap1_fs_pj3
Bank: 0 Reg: 0x02431030 Val: 0x00000454 → dap1_din_pj2
Bank: 0 Reg: 0x02431038 Val: 0x00000400 → dap1_dout_pj1
Bank: 0 Reg: 0x02431040 Val: 0x00000400 → dap1_sclk_pj0

16.738014] tlv320aic31xx-codec 8-0018: ## aic31xx_hw_params: width 16 rate 44100
[ 16.747859] tlv320aic31xx-codec 8-0018: pll 7.5264/1 dosr 128 n 8 m 2 aosr 128 n 8 m 2 bclk_n 16
[ 16.747906] tegra210-i2s tegra210-i2s.0: tegra210_i2s_rx_stop
[ 16.863813] tegra210-i2s tegra210-i2s.0: Failed at I2S0_RX sw reset
[ 16.870130] tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP RX event failed: -22
[ 17.113063] tlv320aic31xx-codec 8-0018: ## aic31xx_hw_params: width 16 rate 44100
[ 17.119211] tlv320aic31xx-codec 8-0018: pll 7.5264/1 dosr 128 n 8 m 2 aosr 128 n 8 m 2 bclk_n 8
[ 17.119245] tegra210-i2s tegra210-i2s.0: tegra210_i2s_rx_stop
[ 17.235343] tegra210-i2s tegra210-i2s.0: Failed at I2S0_RX sw reset
[ 17.241635] tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP RX event failed: -22
[ 17.441297] tlv320aic31xx-codec 8-0018: ## aic31xx_hw_params: width 16 rate 44100
[ 17.447961] tlv320aic31xx-codec 8-0018: pll 7.5264/1 dosr 128 n 8 m 2 aosr 128 n 8 m 2 bclk_n 16
[ 17.573621] tegra210-i2s tegra210-i2s.0: Failed at I2S0_TX sw reset
[ 17.579917] tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP TX event failed: -22
[ 17.764024] tlv320aic31xx-codec 8-0018: ## aic31xx_hw_params: width 16 rate 44100
[ 17.769181] tlv320aic31xx-codec 8-0018: pll 7.5264/1 dosr 128 n 8 m 2 aosr 128 n 8 m 2 bclk_n 16
[ 17.769302] tegra210-i2s tegra210-i2s.0: tegra210_i2s_rx_stop
[ 17.919183] tegra210-i2s tegra210-i2s.0: Failed at I2S0_RX sw reset
[ 17.925581] tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP RX event failed: -22
[ 17.954685] tlv320aic31xx-codec 8-0018: ## aic31xx_hw_params: width 16 rate 44100
[ 17.960801] tlv320aic31xx-codec 8-0018: pll 7.5264/1 dosr 128 n 8 m 2 aosr 128 n 8 m 2 bclk_n 8
[ 17.960834] tegra210-i2s tegra210-i2s.0: tegra210_i2s_rx_stop
[ 18.083499] tegra210-i2s tegra210-i2s.0: Failed at I2S0_RX sw reset
[ 18.089825] tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP RX event failed: -22
[ 18.151989] tlv320aic31xx-codec 8-0018: ## aic31xx_hw_params: width 16 rate 44100
[ 18.157015] tlv320aic31xx-codec 8-0018: pll 7.5264/1 dosr 128 n 8 m 2 aosr 128 n 8 m 2 bclk_n 8
[ 18.282725] tegra210-i2s tegra210-i2s.0: Failed at I2S0_TX sw reset
[ 18.283540] IPv6: ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready
[ 18.289038] tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP TX event failed: -22
[ 18.491013] tlv320aic31xx-codec 8-0018: ## aic31xx_hw_params: width 16 rate 44100
[ 18.498304] tlv320aic31xx-codec 8-0018: pll 7.5264/1 dosr 128 n 8 m 2 aosr 128 n 8 m 2 bclk_n 16
[ 18.498356] tegra210-i2s tegra210-i2s.0: tegra210_i2s_rx_stop
[ 18.617513] tegra210-i2s tegra210-i2s.0: Failed at I2S0_RX sw reset
[ 18.624328] tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP RX event failed: -22
[ 18.654925] tlv320aic31xx-codec 8-0018: ## aic31xx_hw_params: width 16 rate 44100
[ 18.661872] tlv320aic31xx-codec 8-0018: pll 7.5264/1 dosr 128 n 8 m 2 aosr 128 n 8 m 2 bclk_n 8
[ 18.661922] tegra210-i2s tegra210-i2s.0: tegra210_i2s_rx_stop
[ 18.777827] tegra210-i2s tegra210-i2s.0: Failed at I2S0_RX sw reset
[ 18.784125] tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP RX event failed: -22
[ 18.862737] tlv320aic31xx-codec 8-0018: ## aic31xx_hw_params: width 16 rate 44100
[ 18.867855] tlv320aic31xx-codec 8-0018: pll 7.5264/1 dosr 128 n 8 m 2 aosr 128 n 8 m 2 bclk_n 8
[ 18.985119] tegra210-i2s tegra210-i2s.0: Failed at I2S0_TX sw reset
[ 18.991644] tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP TX event failed: -22
Thanks,

[mkumard]

Hi terrysu50z,
The failure on the attached log will pop up when Tegra I2S1 was running on Slave mode and Pinmux not set properly to receive the clock from external codec. Can you confirm whether Tegra I2S1 was configured as Slave in your usecase?.

Also the pinmux configuration for I2S1 needs to be set to bi-directional to operate I2S1 clock Fs, SCLK in both Master and Slave mode. Can you try setting pinmux as below.

0x02431028 = 0x00000440 → dap1_fs_pj3
0x02431030 = 0x00000454 → dap1_din_pj2
0x02431038 = 0x00000400 → dap1_dout_pj1
0x02431040 = 0x00000440 → dap1_sclk_pj0