TX2's UART ISR handler

Looking for an example of Interrupt Service Routine to handle UART request.

Hi fa.arad,

Are you using the devkit or custom board for TX2?
What’s the Jetpack version in use?

I think the current UART driver will handle for interrupt by default.
Could you share the full device tree and dmesg from your board?

Hi Chunuaif,

I do not use the custom board for TX2 just the standard one that it comes with. The output of the ‘cat /etc/nv_tegra_release’ command is as follow:

cat /etc/nv_tegra_release

R32 (release), REVISION: 4.4, GCID: 23942405, BOARD: t186ref, EABI: aarch64, DATE: Fri Oct 16 19:37:08 UTC 2020

The current release does come with an ISR for the UART serial communication. I use the following setting for the serial port file descriptor:
/*
Function to configure the serial port
port=“/dev/ttyTHS2”,
baudrate=921600,
bytesize=serial.EIGHTBITS,
parity=serial.PARITY_NONE,
stopbits=serial.STOPBITS_ONE, )
*/

I use the ‘read ( file_descriptor, buffer, buffer_size)’ inside of a while loop to read the content, however, there is jitter in mili-seconds and I need to reduce it to micro-seconds. On TX2 Jetson’s all the UART ISRs go through core 0 and I can improve on it by writing a kernel module for the uart and isolate it to core 1/core 2 which are (optimized Denvers). This should help out. I wondering if somebody else has already done this and I could use their code as a starting point.

Best Wishes,
Faramarz Arad

There is no update from you for a period, assuming this is not an issue anymore.
Hence, we are closing this topic. If need further support, please open a new one.
Thanks
~0107

Have you tried to configure the smp_affinity for the UART interface for this use case?
Please also share the full dmesg for further check.