Update pinmux configuration L4T 32.1

Hello,

I am currently trying to modify a pin configuration for the Jetson Xavier working with the L4T 32.1.

I am following these steps:

  • Modifying the excel "pinmux configuration template
  • Generating dtsi file
  • Compiling the .cfg file from the dtsi file with the python script
  • Copying the cfg to the bootloader/t186ref/BCT folder with the name "tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg"
  • Flashing the board with the Flash.sh script: sudo ./flash.sh jetson-xavier mmcblk0p1

However, my pin configuration modification does not seem to be taken into account. Do you know what I am doing wrong ?

I also would like to avoid flashing the whole jetson every time I try to modify a pin. Would it be possible to use a specific option of the flash.sh script to only flash the cfg files ? Like :

  • sudo ./flash.sh -r -k kernel jetson-xavier mmcblk0p1
  • sudo ./flash.sh -r -k kernel-dtb jetson-xavier mmcblk0p1

Thanks in advance,

Could you specify which pin does not change?

Hello,

I am trying to change the following signal names:

  • I2C4_CLK: from I2C8 CLK to GPIO3_PDD.01
  • I2C4_DAT: from I2C8 DAT to GPIO3_PDD.02
  • GPIO17: from input to output

I am then trying to export the GPIO3_PDD.01 in linux:

  • sudo su
  • echo 521 > export

The output of the echo line is “invalid argument”.

My computation to get the GPIO3_PDD.01 number : 288 (base offset) + 29 (port number DD) * 8 + 1 = 521

I did the same for the GPIO17: 288 + 16*8 + 1 = 417

I could confirm this value from: https://www.jetsonhacks.com/nvidia-jetson-agx-xavier-gpio-header-pinout/

I can successfully export the gpio417 but the direction of the pin is still input while I changed it to output.

Kind regards

Hi,

What table points out port DD# is 29? I thought it should be 248+ 3 (DD#) * 8 + 1 = 273.
Please refer to tegra194-gpio.h.

Hi,

I found it in the tegra194-gpio.h.

#define TEGRA_PIN_BASE_ID_DD 29

What is the difference between AON pin and the pin base ?

To get the gpio417 for the GPIO17, I had to use 288 as the base offset. Why do you use 248 ? How can I know which one to use ?

Thanks in advance,

When calculating the GPIO number, please use TEGRA194_MAIN_GPIO_PORT and TEGRA194_AON_GPIO_PORT.

Some ports are in main and others in AON gpio.

Hi,

Thanks for the answers.

Kind regards

Hi Mobilaz,
thanks for your share, Can you change the pinmux as you want?
I want to change the pinmux as well ,and I use your steps, the .cfg file can be generated with my modification.
but when I flash it to xaiver, it seems does not work, for example, I change the SPI mem value as

pinmux.0x0243d040 = 0x00000400;

after flash the new .cfg, I check the value of 243d040, it shows original value, not 400, I don’t know what’s wrong with my flash.

Hi Gaosiy,

Would you mind using a full flash instead of flashing specific partition?

Hi Wayne,
thanks for your suggestion, if full flash can enable spi1, I can try it anyway. can you turn to the new topic to help me with SPI1 enable?
https://devtalk.nvidia.com/default/topic/1056519/jetson-agx-xavier/tired-to-enable-spi1-of-xavier-with-l4t-32-1/

Hi Wayne,
could you help with questions highlighted in red of the attachment? The attachment is the instruction that I combined for updating Pinmux on Production Nano. After flashed the nano, the pins that I changed to input did update ( i still need to run “echo in”).Pinmux Changes.docx (24.8 KB)

thank you,