Problem Modifying tx2 pinmux

harck0007 · March 2, 2021, 10:36pm

Hi, I need I little help with pinmux modifications. I will appreciate your time.
I am new in this.

I am following this tutorial to change the pinmux in the tx2:

https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/adaptation_and_bringup_tx2.html#wwpID0E0LP0HA

In summary:

Modify the spreadsheet (excel) and generate the .dtsi files. (spreadsheet: https://developer.nvidia.com/embedded/downloads#?search=TX2%20Series%20Pinmux)
Generate the cfg file

python pinmux-dts2cfg.py --pinmux addr_info.txt gpio_addr_info.txt por_val.txt --mandatory_pinmux_file mandatory_pinmux.txt \
    <my_path>/tegra18x-jetson-tx2-config-template-pinmux.dtsi \
    <my_path>/tegra18x-jetson-tx2-config-template-gpio-default.dtsi 1.0 \
	>  <my_path>/tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg

Flash my tx2.

When I use the pins:

SPI1_CLK - G13 - GPIO3_PN.03
SPI1_MISO - F14 - GPIO3_PN.04
SPI1_MOSI - F13 - GPIO3_PN.05
SPI1_CS0# - E14 - GPIO3_PN.06

All works fine, I can change the direction (input/output) of the pins and the initial values (0/1). When I export it as gpio I can see the expected direction/value.

But I need change the direction of the next pins, but nothing happen:

SPI2_CLK - H14 - SPI1_SCK
SPI2_MISO - H15 - SPI1_DIN
SPI2_MOSI - G15 - SPI1_DOUT
SPI2_CS0# - G16 - SPI1_CS0

When I export it as gpio I don not see the changes direction/value.
When I generate the cfg with recommended parameters I get the error:

python pinmux-dts2cfg.py --pinmux addr_info.txt gpio_addr_info.txt por_val.txt --mandatory_pinmux_file mandatory_pinmux.txt \
    <my_path>/tegra18x-jetson-tx2-config-template-pinmux.dtsi \
    <my_path>/tegra18x-jetson-tx2-config-template-gpio-default.dtsi 1.0 \
	>  <my_path>/tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg
...
ERROR: pin gpio_wan5_ph0(0x00000456) field nvidia,tristate(0x00000010) is not matching, val = 0x01 expected = 0x00
ERROR: pin gpio_wan5_ph0(0x00000456) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin gpio_wan6_ph1(0x00000402) field nvidia,tristate(0x00000010) is not matching, val = 0x00 expected = 0x01
ERROR: pin gpio_wan6_ph1(0x00000402) field nvidia,enable-input(0x00000040) is not matching, val = 0x00 expected = 0x01

If I remove the --mandatory_pinmux_file mandatory_pinmux.txt I get no errors. But, when I flash my _tx2 I do not see the changes when I export the gpios.

Is there possible change the direction/initial_values of the pins (H14,H15,G15,G16)?
Why the first pins works (G13,F14,F13,E14) fine but the (H14,H15,G15,G16) do not work?
I need to configure them in different ways?

Thank you very much, I really appreciate your time and knowledgement.

ShaneCCC · March 3, 2021, 6:05am

Could you read the pinmux by devmem2 to compare with the SPI1_xx,
You can get the address from the cfg file.

harck0007 · March 4, 2021, 7:14am

Hi, thank you for your time.

This are the changes that I did to the spreadsheet (yellows are working fine, greens are not working).

After this, I create the dtsi files, and the .cfg file. With the cfg file I get some errors (the ones that concern me are those related to gpio_wanX):
Some forums says, It is due to the --mandatory_pinmux_file mandatory_pinmux.txt.

python pinmux-dts2cfg.py --pinmux addr_info.txt gpio_addr_info.txt por_val.txt --mandatory_pinmux_file mandatory_pinmux.txt \
>     <my_path>/tegra18x-jetson-tx2-config-template-pinmux.dtsi \
>     <my_path>/tegra18x-jetson-tx2-config-template-gpio-default.dtsi 1.0 \
> >  <my_path>/tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg
ERROR: pin dap2_sclk_pc1(0x00000440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dap2_fs_pc4(0x00000440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dmic1_clk_pm1(0x00004441) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dmic2_dat_pm2(0x00004441) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dap4_sclk_pcc0(0x00004440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dap4_fs_pcc3(0x00004440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin sdmmc4_dqs(0x00000444) field nvidia,tristate(0x00000010) is not matching, val = 0x00 expected = 0x01
ERROR: pin gpio_wan5_ph0(0x00000456) field nvidia,tristate(0x00000010) is not matching, val = 0x01 expected = 0x00
ERROR: pin gpio_wan5_ph0(0x00000456) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin gpio_wan6_ph1(0x00000402) field nvidia,tristate(0x00000010) is not matching, val = 0x00 expected = 0x01
ERROR: pin gpio_wan6_ph1(0x00000402) field nvidia,enable-input(0x00000040) is not matching, val = 0x00 expected = 0x01

The cfg file has the addrs/values:

...
pinmux.0x0243d018 = 0x00000456; # gpio_wan5_ph0: spi1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000402; # gpio_wan6_ph1: spi1, tristate-disable, input-disable, lpdr-disable
pinmux.0x0243d008 = 0x00000402; # gpio_wan7_ph2: spi1, tristate-disable, input-disable, lpdr-disable
pinmux.0x0243d000 = 0x0000040a; # gpio_wan8_ph3: spi1, pull-up, tristate-disable, input-disable, lpdr-disable
...
pinmux.0x02430038 = 0x00000056; # gpio_cam4_pn3: rsvd2, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x02430040 = 0x00000002; # gpio_cam5_pn4: rsvd2, tristate-disable, input-disable, lpdr-disable
pinmux.0x02430048 = 0x00000002; # gpio_cam6_pn5: rsvd2, tristate-disable, input-disable, lpdr-disable
pinmux.0x02430050 = 0x00000058; # gpio_cam7_pn6: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable

All the values in the gpio_wan pins are similar that the gpio_cam, but with an ‘4’ prepended (I am doing some research to check what that means).

The values with the devmem2, looks consistent with this file.

$ sudo ./read_pimux.sh 
**********************************************************************
============================== 0x0243d018 : gpio_wan5 : H14
/dev/mem opened.
Memory mapped at address 0x7fa9ac3000.
Value at address 0x243D018 (0x7fa9ac3018): 0x456
============================== 0x0243d010 : gpio_wan6 : H15
/dev/mem opened.
Memory mapped at address 0x7f94942000.
Value at address 0x243D010 (0x7f94942010): 0x402
============================== 0x0243d008 : gpio_wan7 : G15
/dev/mem opened.
Memory mapped at address 0x7fa0b4b000.
Value at address 0x243D008 (0x7fa0b4b008): 0x402
============================== 0x0243d000 : gpio_wan8 : G16
/dev/mem opened.
Memory mapped at address 0x7f86d9e000.
Value at address 0x243D000 (0x7f86d9e000): 0x40A
**********************************************************************
============================== 0x02430038 : gpio_cam4 : G13
/dev/mem opened.
Memory mapped at address 0x7fa3a41000.
Value at address 0x2430038 (0x7fa3a41038): 0x56
============================== 0x02430040 : gpio_cam5 : F14
/dev/mem opened.
Memory mapped at address 0x7f92c82000.
Value at address 0x2430040 (0x7f92c82040): 0x2
============================== 0x02430048 : gpio_cam6 : F13
/dev/mem opened.
Memory mapped at address 0x7fb5083000.
Value at address 0x2430048 (0x7fb5083048): 0x2
============================== 0x02430050 : gpio_cam7 : E14
/dev/mem opened.
Memory mapped at address 0x7f9b0f8000.
Value at address 0x2430050 (0x7f9b0f8050): 0x58

But, the directions/values

echo direction: `cat /sys/class/gpio/gpioXXX/direction`
echo value    : `cat /sys/class/gpio/gpioXXX/value`

Only works for the gpio_camX pins, and the gpio_wanX pins seems to ignore the cfg direction/values.

$ sudo ./read_val.sh 
**********************************************************************

====================================
376: gpio_wan5 : H14 : SPI2_CLK
direction: in
value : 0
====================================
377: gpio_wan6 : H15 : SPI2_MISO
direction: in
value : 0
====================================
378: gpio_wan7 : G15 : SPI2_MOSI
direction: in
value : 0
====================================
379: gpio_wan8: G16 : SPI2_CS0#
direction: in
value : 0
**********************************************************************
====================================
427: gpio_cam4 : G13 : SPI1_CLK
direction: in
value : 0
====================================
428: gpio_cam5 : F14 : SPI1_MISO
direction: out
value : 1
====================================
429: gpio_cam6 : F13 : SPI1_MOSI
direction: out
value : 1
====================================
430: gpio_cam7 : E14 : SPI1_CS0#
direction: in
value : 0

What can I do to work with the gpio_wan pins?
Can you give me some adavice?
Please.

Thank you very much, I appreciate your time.

ShaneCCC · March 4, 2021, 8:01am

Just check on J4.5 with default system image to change the direction and value for the gpio376 without problem.
What’s your BSP version?

harck0007 · March 4, 2021, 8:12am

Thanks for your testings.

Tegra186_Linux_R32.3.1_aarch64.tbz2
JetPack_4.3_Linux_P3310

Do you think that could be the problem?
I will try to run with a new version.

ShaneCCC · March 4, 2021, 9:37am

I check the r32.4.3 without problem on default system image.

root@nvidia-desktop:/home/nvidia# cd /sys/class/gpio/
root@nvidia-desktop:/sys/class/gpio# l
export  gpiochip216@  gpiochip224@  gpiochip240@  gpiochip256@  gpiochip320@  unexport
root@nvidia-desktop:/sys/class/gpio# echo 376 > export
root@nvidia-desktop:/sys/class/gpio# cd gpio376/
root@nvidia-desktop:/sys/class/gpio/gpio376# cat direction
in
root@nvidia-desktop:/sys/class/gpio/gpio376# echo out > direction
root@nvidia-desktop:/sys/class/gpio/gpio376# cat direction
out
root@nvidia-desktop:/sys/class/gpio/gpio376# cat value
0
root@nvidia-desktop:/sys/class/gpio/gpio376# echo 1 > value
root@nvidia-desktop:/sys/class/gpio/gpio376# cat value
1
root@nvidia-desktop:/sys/class/gpio/gpio376# cat /etc/nv_tegra_release
# R32 (release), REVISION: 4.3, GCID: 21589087, BOARD: t186ref, EABI: aarch64, DATE: Fri Jun 26 04:34:27 UTC 2020

harck0007 · March 4, 2021, 10:01am

Thanks a lot for your testing.

I can change the direction/output of the pins in the same way you did.
But, I can not set a default. For example, I am trying to set 376 defaults values as: direction=“out”, value=“1”.

When I set a default in the gpio_cam pins (427,428,429,430) all works fine.
But with the gpio_wan pins (376,377,378) I always get a default: direction:“in”, values=“0”, no matter what I set in the tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg file (spreadsheet → dtsi → cfg).

I am following this steps:

Change pins directions in spreadsheet.
Generate dtsi files with the excel buton.
Generate .cfg file with the command: python pinmux-dts2cfg.py
Flash tx2 with the new: tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg

I really appreciate your help.
Thank you.

ShaneCCC · March 4, 2021, 12:33pm

If you would like to use gpio sysfs node to control it. I think it couldn’t define a default value for it.
However you can define it like below. And have driver to control it. Not sure if define as below the gpio sysfs still can control it or not.

    gpio@2200000 {
            camera-control-output-high {
                    gpio-hog;
                    gpios = <CAM1_RST_L 0>;
                    output-high;
                    label = "cam1-rst";
            };
    };