Hello,
i’m working on a custom designed board which uses two USB3.0 ports (Host only). PCIe is not used.
The two USB ports are connected as following:
USB3.0 (1)
USB1_D (A38, A39)
USB_SS (F43, F44, C43, C44)
USB3.0 (2)
USB1_D (B42, B43)
USB_SS (G42, G43, D43, D43)
USB3.0 (1) is working fine but the other one gets recognized only as a USB2.0 port.
From the “Platform Adaption and Bring up Guide” i noticed that i have to use config #4.
Therefore i changed the ODMDATA to 0x07090000 in p2771-0000.conf.common (i read about this value on another thread).
ODMDATA=0x07090000; # default = C0X
Here my changes i have made in “tegra186-quill-p3310-1000-a00-00-base.dts”.
I’m not very experienced with device trees, so i would highly appreciate your help.
xhci@3530000 {
status = "okay";
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
[b]<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>,
<&tegraxusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(2)>;[/b]
phy-names = <b>"utmi-0", "utmi-1", "utmi-2", "usb3-0", "usb3-1", "usb3-2"</b>;
nvidia,boost_cpu_freq = <800>;
};
pinctrl@3520000 {
status = "okay";
pinctrl-0 = <&tegra_xusb_padctl_pinmux_default>;
pinctrl-1 = <&vbus_en0_sfio_tristate_state>;
pinctrl-2 = <&vbus_en1_sfio_tristate_state>;
pinctrl-3 = <&vbus_en0_sfio_passthrough_state>;
pinctrl-4 = <&vbus_en1_sfio_passthrough_state>;
pinctrl-5 = <&vbus_en0_default_state>;
pinctrl-6 = <&vbus_en1_default_state>;
pinctrl-names = "default",
"vbus_en0_sfio_tristate", "vbus_en1_sfio_tristate",
"vbus_en0_sfio_passthrough", "vbus_en1_sfio_passthrough",
"vbus_en0_default", "vbus_en1_default";
tegra_xusb_padctl_pinmux_default: pinmux {
/* Quill does not support usb3-micro AB */
usb2-micro-AB {
nvidia,lanes = "otg-0";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_OTG_CAP>;
nvidia,oc-pin = <0>;
};
usb2-std-A-port2 {
nvidia,lanes = "otg-1";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
usb3-std-A-port2 {
nvidia,lanes = "usb3-1";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
[b]usb3-std-A-port3 {
nvidia,lanes = "usb3-2";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "okay";
};[/b]
e3325-usb3-std-A-HS {
nvidia,lanes = "otg-2";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "disabled";
};
e3325-usb3-std-A-SS {
nvidia,lanes = "usb3-0";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "disabled";
};
};
};
<b>/*</b>pcie-controller@10003000 {
status = "okay";
pci@1,0 {
nvidia,num-lanes = <2>;
status = "okay";
};
pci@2,0 {
nvidia,num-lanes = <1>;
status = "disabled";
};
pci@3,0 {
nvidia,num-lanes = <1>;
status = "okay";
};
};<b>*/</b>