Using the Rear 10GbE ports (J20, J59) on NVIDIA Drive AGX

Hardware Platform: DRIVE AGX Xavier™ Developer Kit
Software Version: DRIVE Software 10
Host Machine Version: native Ubuntu 18.04
SDK Manager Version:

Is there a documented procedure for connecting the host to the Xavier A on the NVIDIA Drive AGX via the 10GbE RJ45 ports (J20 / J59) on the rear side?

I’ve been basing my efforts on this diagram:

On Xavier A (target), I can see the enp4s0 interface configured with the static IP as indicated, but I can’t ping in either direction (target to host or host to target) when I configure my host interface to static, for example.

I suspect that the PCI switch in the diagram above is not configured as I need it to be (as I can’t ping Xavier B ( from Xavier A either).

I haven’t found any documentation that directly addresses my use case. It looks like the 10GbE ports are used in the Hyperion configuration, so it must be possible to enable them, but for some reason they don’t appear to be enabled on my unit.

What is the simplest way to enable the rear 10GbE RJ45 ports so I can use them to connect my host to the target?

Hi @evanmt03s,

Per the user’s post below, the communication works without software configuration. FYI.

VickNV, thanks for the link.

Since your reply I tried a lot of different things and ended up getting communication over the 10GbE ports working. My process included flashing usecase7.0 on PCIe switch 1.

Because the documentation didn’t cover this networking subject in detail, I’m not sure whether I actually needed to flash usecase7.0.

I only found that I could communicate with Xavier A and B via the 10G ports through trial and error. Everything made sense once I finally realized that I could only access Xavier A via port 2, and Xavier B via port 1.


  1. Is this port association: [XA -> 10GbE RJ45 2, XB -> 10GbE RJ45 1] expected?
  2. Does the documentation cover this port association?
  3. Is usecase7.0 required for communication out via these ports, or does usecase4.0 also work?
  4. The lights don’t turn on on the 10GbE ports even while they’re active. Is this expected?
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Please check “3.3.3 10 GbE RJ45 Connectors” in

I don’t think you need to flash config file. According to the post, it’s working by default.

I’ll check with the team and let you know. Thanks!

Thanks for your quick reply.

I actually referred to that document early in my process:

The table led me to believe that either Xavier could be accessed from either port, which was one reason it took me so long to figure out that I could only access one of the two Xaviers from a given port. Does that mean there’s something wrong with my setup, or could this table be inaccurate?

Good to know for the future, thanks.

Thanks for checking!

According to below description in “Ethernet Network Topology in AV Configuration”, it is configured in the PCIe switch. FYI.

5.Each Xavier has one RJ45 10G port assigned, the port is enumerated as enp4s0 on Xavier A and enp3s0 on Xavier B. PCIe switch (PM8534) configuration use case 4.0 (the default in DRIVE AGX boards) provides this mapping.

Ethernet connectors J20/J45 LEDs not working is expected behavior, these LEDs don’t have hardware connection. Ethernet function could work, just without lights.

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@VickNV @JimWang thank you both for your detailed and responsive support.

As a developer building on the NVIDIA Drive platform, I think those two notes:

  1. The 10GbE RJ45 port mapping depends on the PCIe switch configuration, and both Xaviers may not be accessible from either port (as I interpreted the table to mean)
  2. The 10GbE RJ45 port lights are not connected in hardware and will not light up, even when the ports are otherwise functioning properly

would make very helpful additions to section 3.3.3 of the Mechanical Installation Guide for those trying to use the 10GbE RJ45 ports outside of the Hyperion config.


Thanks for your summary!

“DRIVE AGX Developer Kit Mechanical & Installation Guide” is a doc from a hardware perspective. I guess that’s why it doesn’t describe the exact connections between the ports and Xavier A/B.