Why P3768-A04 uses USB0 and USBSS1 for the Type-C port?

Autonomous Machines Jetson & Embedded Systems Jetson Orin Nano
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There are USB0~2 for USB2.0 and USBSS0~2 for USB3.2. Why not USB0+USBSS0 for the Type-C port in P3768-A04?

P3768-A04 also uses USB1 + USBSS0 to connect the USB hub, and USB2 D_N/P are allocated to M2E.BT.

Is there any partitcular reason for this interleaved design, or just to demonstrate the flexibility of USBx + USBSSy combinations?

If I would like to design a custom board with 3 USB3.2 ports, could I use USBx+USBSSx, while reallocating ME.BT to PCIE1_RX0/TX0? What chores should I be aware of? Thanks!

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Hi, you can combine any one of USB2.0 port with any one of USBSS port.

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