Jeston Orin Nano Custom Board - have i made a mistake?

[hbuk]

Hi,
I’ve designed a custom PCB based on P3768-A04 with the following hardware -
USB0 to a USB connector for recovery
USB1 and USBSS0 to a USB3.1 connector
USB2 and USBSS2 to a USB3.1 connector
PCIe0_0, PCIe0_1, PCIe0_2 and PCIe0_3 to M.2.M (NVMe) connector
PCIE1_0 to additional PCIe GigE chipset
GigE to Ethernet connector
HDMI to connector.

I have removed the following from my design -
USB hub circuitry
USB-c circuitry
M.2 M (NVMe) freeing up PCIE2_0 and PCIE2_1
M.2 E socket (WiFi and BT) freeing up USB2 and PCIE1_0
Displayport

My concern is the use of USBSS2 and will this cause mapping options with my use of PCIe ports? With hindsight i think that i should have used USBSS1 instead of USBSS2?

Im afraid at this moment, i dont fully understand the UPHY mapping options which is what has caused my post.

Any guidance on whether (1) the above will work and (2) what changes i need to make to configuration would be most helpful.

Thanks

[Trumany]

Hi, which option of below did you use? Below options are all supported.

[hbuk]

We’re flashing from files derived from the jetson-nano-orin-devkit.conf and related files.

We had to make changes to get the HDMI port working correctly and remove an issue with the ID EEPROM which isn’t fitted on our board.

Looking through the code it appears to be hsio-uphy-config-0 that is used, which i believe corresponds to Option#1?

We think that we need to enable USBSS2 (and disable USBSS1)? But otherwise all should be well with our use of USB and PCIe?

This is all a bit of steep learning curve for me and my software guy so any guidance is well received.