WOL (Wake On LAN) for Mellanox ConnectX-4 Lx (MCX4121A-ACAT)?


I was browsing through the documentation and trying to get WOL working with a Mellanox ConnectX-4 Lx card.

I just found some older material for ConnectX-3 with “…set WOL_MAGIC_EN_P1=1” (Wake On Lan (WOL) MCX311A-XCAT - not supported?).

Is there a way to enable this for my card (MCX4121A-ACAT)? Any support / tutorial material available … ?

I do not have a CX4 LX handy to check though, first validate if the “WOL_MAGIC_EN_P#” present via the configurable parameters with our mlxconfig utility. Then check if if enable or disable by default.
You can use the same utility to set the parameter if available.

mst start
mst status -v (list of mst devices)
mlxconfig -d q | grep WOL_MAGIC_EN_P*

According to our MLNX_OFED driver, you can use the ethtool utility:
Page 121, Wake-on-LAN (WoL)

Output of the query “mlxconfig -d mt4117_pciconf0 query” does not show any WOL parameters:

Device #1:

Device type:    ConnectX4LX
Name:           MCX4121A-ACA_Ax
Description:    ConnectX-4 Lx EN network interface card; 25GbE dual-port SFP28; PCIe3.0 x8; ROHS R6
Device:         mt4117_pciconf0

Configurations:                                      Next Boot
         MEMIC_BAR_SIZE                              0
         MEMIC_SIZE_LIMIT                            _256KB(1)
         FLEX_PARSER_PROFILE_ENABLE                  0
         FLEX_IPV4_OVER_VXLAN_PORT                   0
         ROCE_NEXT_PROTOCOL                          254
         PF_NUM_OF_VF_VALID                          False(0)
         NON_PREFETCHABLE_PF_BAR                     False(0)
         VF_VPD_ENABLE                               False(0)
         STRICT_VF_MSIX_NUM                          False(0)
         VF_NODNIC_ENABLE                            False(0)
         NUM_PF_MSIX_VALID                           True(1)
         NUM_OF_VFS                                  8
         NUM_OF_PF                                   2
         SRIOV_EN                                    True(1)
         PF_LOG_BAR_SIZE                             5
         VF_LOG_BAR_SIZE                             0
         NUM_PF_MSIX                                 63
         NUM_VF_MSIX                                 11
         INT_LOG_MAX_PAYLOAD_SIZE                    AUTOMATIC(0)
         PCIE_CREDIT_TOKEN_TIMEOUT                   0
         MAX_ACC_OUT_READ                            0
         ACCURATE_TX_SCHEDULER                       False(0)
         PARTIAL_RESET_EN                            False(0)
         SW_RECOVERY_ON_ERRORS                       False(0)
         RESET_WITH_HOST_ON_ERRORS                   False(0)
         PCI_BUS0_RESTRICT_SPEED                     PCI_GEN_1(0)
         PCI_BUS0_RESTRICT_ASPM                      False(0)
         PCI_BUS0_RESTRICT_WIDTH                     PCI_X1(0)
         PCI_BUS0_RESTRICT                           False(0)
         PCI_DOWNSTREAM_PORT_OWNER                   Array[0..15]
         CQE_COMPRESSION                             BALANCED(0)
         IP_OVER_VXLAN_EN                            False(0)
         MKEY_BY_NAME                                False(0)
         UCTX_EN                                     True(1)
         PCI_ATOMIC_MODE                             PCI_ATOMIC_DISABLED_EXT_ATOMIC_ENABLED(0)
         TUNNEL_ECN_COPY_DISABLE                     False(0)
         LRO_LOG_TIMEOUT0                            6
         LRO_LOG_TIMEOUT1                            7
         LRO_LOG_TIMEOUT2                            8
         LRO_LOG_TIMEOUT3                            13
         ICM_CACHE_MODE                              DEVICE_DEFAULT(0)
         TX_SCHEDULER_BURST                          0
         LOG_MAX_QUEUE                               17
         LOG_DCR_HASH_TABLE_SIZE                     14
         MAX_PACKET_LIFETIME                         0
         DCR_LIFO_SIZE                               16384
         ROCE_CC_PRIO_MASK_P1                        255
         ROCE_CC_PRIO_MASK_P2                        255
         CLAMP_TGT_RATE_AFTER_TIME_INC_P1            True(1)
         CLAMP_TGT_RATE_P1                           False(0)
         RPG_TIME_RESET_P1                           300
         RPG_BYTE_RESET_P1                           32767
         RPG_THRESHOLD_P1                            1
         RPG_MAX_RATE_P1                             0
         RPG_AI_RATE_P1                              5
         RPG_HAI_RATE_P1                             50
         RPG_GD_P1                                   11
         RPG_MIN_DEC_FAC_P1                          50
         RPG_MIN_RATE_P1                             1
         RATE_TO_SET_ON_FIRST_CNP_P1                 0
         DCE_TCP_G_P1                                1019
         DCE_TCP_RTT_P1                              1
         RATE_REDUCE_MONITOR_PERIOD_P1               4
         INITIAL_ALPHA_VALUE_P1                      1023
         MIN_TIME_BETWEEN_CNPS_P1                    4
         CNP_802P_PRIO_P1                            6
         CNP_DSCP_P1                                 48
         CLAMP_TGT_RATE_AFTER_TIME_INC_P2            True(1)
         CLAMP_TGT_RATE_P2                           False(0)
         RPG_TIME_RESET_P2                           300
         RPG_BYTE_RESET_P2                           32767
         RPG_THRESHOLD_P2                            1
         RPG_MAX_RATE_P2                             0
         RPG_AI_RATE_P2                              5
         RPG_HAI_RATE_P2                             50
         RPG_GD_P2                                   11
         RPG_MIN_DEC_FAC_P2                          50
         RPG_MIN_RATE_P2                             1
         RATE_TO_SET_ON_FIRST_CNP_P2                 0
         DCE_TCP_G_P2                                1019
         DCE_TCP_RTT_P2                              1
         RATE_REDUCE_MONITOR_PERIOD_P2               4
         INITIAL_ALPHA_VALUE_P2                      1023
         MIN_TIME_BETWEEN_CNPS_P2                    4
         CNP_802P_PRIO_P2                            6
         CNP_DSCP_P2                                 48
         LLDP_NB_DCBX_P1                             False(0)
         LLDP_NB_RX_MODE_P1                          OFF(0)
         LLDP_NB_TX_MODE_P1                          OFF(0)
         LLDP_NB_DCBX_P2                             False(0)
         LLDP_NB_RX_MODE_P2                          OFF(0)
         LLDP_NB_TX_MODE_P2                          OFF(0)
         ROCE_RTT_RESP_DSCP_P1                       0
         ROCE_RTT_RESP_DSCP_MODE_P1                  DEVICE_DEFAULT(0)
         ROCE_RTT_RESP_DSCP_P2                       0
         ROCE_RTT_RESP_DSCP_MODE_P2                  DEVICE_DEFAULT(0)
         DCBX_IEEE_P1                                True(1)
         DCBX_CEE_P1                                 True(1)
         DCBX_WILLING_P1                             True(1)
         DCBX_IEEE_P2                                True(1)
         DCBX_CEE_P2                                 True(1)
         DCBX_WILLING_P2                             True(1)
         KEEP_ETH_LINK_UP_P1                         True(1)
         KEEP_IB_LINK_UP_P1                          False(0)
         KEEP_LINK_UP_ON_BOOT_P1                     False(0)
         KEEP_LINK_UP_ON_STANDBY_P1                  False(0)
         DO_NOT_CLEAR_PORT_STATS_P1                  False(0)
         AUTO_POWER_SAVE_LINK_DOWN_P1                False(0)
         KEEP_ETH_LINK_UP_P2                         True(1)
         KEEP_IB_LINK_UP_P2                          False(0)
         KEEP_LINK_UP_ON_BOOT_P2                     False(0)
         KEEP_LINK_UP_ON_STANDBY_P2                  False(0)
         DO_NOT_CLEAR_PORT_STATS_P2                  False(0)
         AUTO_POWER_SAVE_LINK_DOWN_P2                False(0)
         NUM_OF_VL_P1                                _4_VLs(3)
         NUM_OF_TC_P1                                _8_TCs(0)
         NUM_OF_PFC_P1                               8
         VL15_BUFFER_SIZE_P1                         0
         NUM_OF_VL_P2                                _4_VLs(3)
         NUM_OF_TC_P2                                _8_TCs(0)
         NUM_OF_PFC_P2                               8
         VL15_BUFFER_SIZE_P2                         0
         DUP_MAC_ACTION_P1                           LAST_CFG(0)
         SRIOV_IB_ROUTING_MODE_P1                    LID(1)
         IB_ROUTING_MODE_P1                          LID(1)
         DUP_MAC_ACTION_P2                           LAST_CFG(0)
         SRIOV_IB_ROUTING_MODE_P2                    LID(1)
         IB_ROUTING_MODE_P2                          LID(1)
         PHY_FEC_OVERRIDE_P1                         DEVICE_DEFAULT(0)
         PHY_FEC_OVERRIDE_P2                         DEVICE_DEFAULT(0)
         ROCE_CONTROL                                ROCE_ENABLE(2)
         PCI_WR_ORDERING                             per_mkey(0)
         MULTI_PORT_VHCA_EN                          False(0)
         PORT_OWNER                                  True(1)
         ALLOW_RD_COUNTERS                           True(1)
         RENEG_ON_CHANGE                             True(1)
         TRACER_ENABLE                               True(1)
         IP_VER                                      IPv4(0)
         BOOT_UNDI_NETWORK_WAIT                      0
         UEFI_HII_EN                                 True(1)
         BOOT_DBG_LOG                                False(0)
         UEFI_LOGS                                   DISABLED(0)
         BOOT_VLAN                                   1
         LEGACY_BOOT_PROTOCOL                        PXE(1)
         BOOT_INTERRUPT_DIS                          False(0)
         BOOT_LACP_DIS                               True(1)
         BOOT_VLAN_EN                                False(0)
         BOOT_PKEY                                   0
         DYNAMIC_VF_MSIX_TABLE                       False(0)
         EXP_ROM_UEFI_ARM_ENABLE                     False(0)
         EXP_ROM_UEFI_x86_ENABLE                     True(1)
         EXP_ROM_PXE_ENABLE                          True(1)
         FORCE_ETH_PCI_SUBCLASS                      False(0)
         ADVANCED_PCI_SETTINGS                       True(1)
         SAFE_MODE_THRESHOLD                         10
         SAFE_MODE_ENABLE                            True(1)

Full output of query “mlxconfig -d mt4117_pciconf0 show_confs” see in file:
full-cmd-output.txt (163.1 KB)

Line 1421 says something about it:

                WOL CONF:
                    WOL_MAGIC_EN=<False|True>               Enables server Wake-on-LAN upon reception of WOL magic packet.
                PF PCI CONF:
                    PF_DEVICE_ID=<NUM>                      The PCIe device ID used by this function.
                    PF_NUM_OF_VF=<NUM>                      The total number of Virtual Functions (VFs) that will be exposed, for this PF. Value 0x0 indicates SR-IOV will be disabled.
                                                            Valid only when PF_NUM_OF_VF_VALID is set to TRUE
                    PF_NUM_PF_MSIX=<NUM>                    Number of MSI-X vectors assigned for this PF
                                                            Value 0x0 indicates device defaults.
                                                            Valid only when PF_NUM_PF_MSIX_VALID is set to TRUE
                    PF_NUM_VF_MSIX=<NUM>                    Number of MSI-X vectors assigned for each VF associated with the PF.
                                                            Value 0x0 indicates device defaults
                                                            valid only when PER_PF_NUM_VF_MSIX is set to TRUE.
                    PF_SF_BAR_SIZE=<NUM>                    Log (base 2) of the BAR size of a single SF, given in KB. Valid only when PF_TOTAL_SF is non-zero and PER_PF_NUM_SF is set to TRUE.
                    PF_TOTAL_SF=<NUM>                       The total number of Sub Function partitions (SFs) that can be sup
                                                            ported, for this PF.
                                                            Valid only when PER_PF_NUM_SF is set to TRUE

Firmware installed on current card:

Device #1:

  Device Type:      ConnectX4LX
  Part Number:      MCX4121A-ACA_Ax
  Description:      ConnectX-4 Lx EN network interface card; 25GbE dual-port SFP28; PCIe3.0 x8; ROHS R6
  PSID:             MT_2420110034
  PCI Device Name:  mt4117_pciconf0
  Base MAC:         1c34da5c212c
  Versions:         Current        Available
     FW             14.32.1010     N/A
     PXE            3.6.0502       N/A
     UEFI           14.25.0017     N/A

  Status:           No matching image found

… which is the latest according to " ConnectX-4 Lx Ethernet Firmware Download Center".

If I try “mlxconfig -d mt4117_pciconf0 set WOL_MAGIC_EN_P1=1” it outputs:

C:\Windows\System32>mlxconfig -d mt4117_pciconf0 set WOL_MAGIC_EN_P1=1

Device #1:

Device type:    ConnectX4LX
Name:           MCX4121A-ACA_Ax
Description:    ConnectX-4 Lx EN network interface card; 25GbE dual-port SFP28; PCIe3.0 x8; ROHS R6
Device:         mt4117_pciconf0

Configurations:                                      Next Boot       New
-E- WOL_MAGIC_EN doesn't have a physical port

If I understand the support manual correctly the “mlxconfig” recognizes the feature but the firmware used in my system does not support WoL?