Possibility to flash Mellanox Connectx-4 Lx EN with WOL (Wake on Lan) support?

Hello,

recently got a Mellanox Connectx-4 Lx EN to work with and I want to find a way to enable WOL. According to this spec-sheet provided by NVIDIA it should support WOL out of the box but it seems my card is missing the configuration option of WOL.

What exactly could be the reason for this and is there any way to enable it again?

The card is used on Windows 11 23H2. Most options I could find to enable WOL require ethtool a UNIX utility that is available for Windows. The WinOF-2 docs also sadly don’t mention a way of achieving this. Older forum post go mostly without a proper answer, so I would like to reopen this issue anew with up to date information.

Could it be that the option is only available through Linux?

Device and Firmware

mlxfwmanager --query
Querying Mellanox devices firmware ...

Device #1:
----------

  Device Type:      ConnectX4LX
  Part Number:      MCX4121A-ACH_Ax
  Description:      ConnectX-4 Lx EN network interface card; with host management; 25GbE dual-port SFP28; PCIe3.0 x8; UEFI enabled;
  PSID:             MT_0000000647
  PCI Device Name:  mt4117_pciconf0
  Base MAC:         b8cef67485ca
  Versions:         Current        Available
     FW             14.32.1900     N/A
     PXE            3.6.0502       N/A
     UEFI           14.25.0017     N/A

  Status:           No matching image found

Supported configuration with current firmware

mlxconfig -d mt4117_pciconf0 query

Device #1:
----------

Device type:        ConnectX4LX
Name:               MCX4121A-ACH_Ax
Description:        ConnectX-4 Lx EN network interface card; with host management; 25GbE dual-port SFP28; PCIe3.0 x8; UEFI enabled;
Device:             mt4117_pciconf0

Configurations:                                          Next Boot
        FLEX_PARSER_PROFILE_ENABLE                  0
        FLEX_IPV4_OVER_VXLAN_PORT                   0
        SWITCH_COMPT_FEATURE_MASK                   0x0(0)
        PF_NUM_OF_VF_VALID                          False(0)
        NON_PREFETCHABLE_PF_BAR                     False(0)
        VF_VPD_ENABLE                               False(0)
        STRICT_VF_MSIX_NUM                          False(0)
        VF_NODNIC_ENABLE                            False(0)
        NUM_PF_MSIX_VALID                           True(1)
        NUM_OF_VFS                                  8
        NUM_OF_PF                                   2
        SRIOV_EN                                    True(1)
        PF_LOG_BAR_SIZE                             5
        VF_LOG_BAR_SIZE                             0
        NUM_PF_MSIX                                 63
        NUM_VF_MSIX                                 11
        PCIE_CREDIT_TOKEN_TIMEOUT                   0
        PCI_BUS0_RESTRICT_SPEED                     PCI_GEN_1(0)
        PCI_BUS0_RESTRICT_ASPM                      False(0)
        PCI_BUS0_RESTRICT_WIDTH                     PCI_X1(0)
        PCI_BUS0_RESTRICT                           False(0)
        PCI_DOWNSTREAM_PORT_OWNER                   Array[0..15]
        LOG_DCR_HASH_TABLE_SIZE                     14
        MAX_PACKET_LIFETIME                         0
        DCR_LIFO_SIZE                               16384
        MEMIC_BAR_SIZE                              0
        MEMIC_SIZE_LIMIT                            _256KB(1)
        ICM_CACHE_MODE                              DEVICE_DEFAULT(0)
        TX_SCHEDULER_BURST                          0
        ACCURATE_TX_SCHEDULER                       False(0)
        PARTIAL_RESET_EN                            False(0)
        SW_RECOVERY_ON_ERRORS                       False(0)
        RESET_WITH_HOST_ON_ERRORS                   False(0)
        ROCE_NEXT_PROTOCOL                          254
        LOG_MAX_QUEUE                               17
        CQE_COMPRESSION                             BALANCED(0)
        IP_OVER_VXLAN_EN                            False(0)
        MKEY_BY_NAME                                False(0)
        UCTX_EN                                     True(1)
        PCI_ATOMIC_MODE                             PCI_ATOMIC_DISABLED_EXT_ATOMIC_ENABLED(0)
        TUNNEL_ECN_COPY_DISABLE                     False(0)
        LRO_LOG_TIMEOUT0                            6
        LRO_LOG_TIMEOUT1                            7
        LRO_LOG_TIMEOUT2                            8
        LRO_LOG_TIMEOUT3                            13
        INT_LOG_MAX_PAYLOAD_SIZE                    AUTOMATIC(0)
        IB_PROTO_WIDTH_EN_MASK_P1                   0
        IB_PROTO_WIDTH_EN_MASK_P2                   0
        KEEP_ETH_LINK_UP_P1                         True(1)
        KEEP_IB_LINK_UP_P1                          False(0)
        KEEP_LINK_UP_ON_BOOT_P1                     False(0)
        KEEP_LINK_UP_ON_STANDBY_P1                  False(0)
        DO_NOT_CLEAR_PORT_STATS_P1                  False(0)
        AUTO_POWER_SAVE_LINK_DOWN_P1                False(0)
        KEEP_ETH_LINK_UP_P2                         True(1)
        KEEP_IB_LINK_UP_P2                          False(0)
        KEEP_LINK_UP_ON_BOOT_P2                     False(0)
        KEEP_LINK_UP_ON_STANDBY_P2                  False(0)
        DO_NOT_CLEAR_PORT_STATS_P2                  False(0)
        AUTO_POWER_SAVE_LINK_DOWN_P2                False(0)
        PHY_FEC_OVERRIDE_P1                         DEVICE_DEFAULT(0)
        PHY_FEC_OVERRIDE_P2                         DEVICE_DEFAULT(0)
        LLDP_NB_DCBX_P1                             False(0)
        LLDP_NB_RX_MODE_P1                          OFF(0)
        LLDP_NB_TX_MODE_P1                          OFF(0)
        LLDP_NB_DCBX_P2                             False(0)
        LLDP_NB_RX_MODE_P2                          OFF(0)
        LLDP_NB_TX_MODE_P2                          OFF(0)
        DCBX_IEEE_P1                                True(1)
        DCBX_CEE_P1                                 True(1)
        DCBX_WILLING_P1                             True(1)
        DCBX_IEEE_P2                                True(1)
        DCBX_CEE_P2                                 True(1)
        DCBX_WILLING_P2                             True(1)
        DUP_MAC_ACTION_P1                           LAST_CFG(0)
        SRIOV_IB_ROUTING_MODE_P1                    LID(1)
        IB_ROUTING_MODE_P1                          LID(1)
        DUP_MAC_ACTION_P2                           LAST_CFG(0)
        SRIOV_IB_ROUTING_MODE_P2                    LID(1)
        IB_ROUTING_MODE_P2                          LID(1)
        NUM_OF_PLANES_P1                            0
        NUM_OF_PLANES_P2                            0
        NUM_OF_VL_P1                                _4_VLs(3)
        NUM_OF_TC_P1                                _8_TCs(0)
        NUM_OF_PFC_P1                               8
        VL15_BUFFER_SIZE_P1                         0
        NUM_OF_VL_P2                                _4_VLs(3)
        NUM_OF_TC_P2                                _8_TCs(0)
        NUM_OF_PFC_P2                               8
        VL15_BUFFER_SIZE_P2                         0
        ROCE_CC_PRIO_MASK_P1                        255
        ROCE_CC_CNP_MODERATION_P1                   DEVICE_DEFAULT(0)
        ROCE_CC_PRIO_MASK_P2                        255
        ROCE_CC_CNP_MODERATION_P2                   DEVICE_DEFAULT(0)
        CLAMP_TGT_RATE_AFTER_TIME_INC_P1            True(1)
        CLAMP_TGT_RATE_P1                           False(0)
        RPG_TIME_RESET_P1                           300
        RPG_BYTE_RESET_P1                           32767
        RPG_THRESHOLD_P1                            1
        RPG_MAX_RATE_P1                             0
        RPG_AI_RATE_P1                              5
        RPG_HAI_RATE_P1                             50
        RPG_GD_P1                                   11
        RPG_MIN_DEC_FAC_P1                          50
        RPG_MIN_RATE_P1                             1
        RATE_TO_SET_ON_FIRST_CNP_P1                 0
        DCE_TCP_G_P1                                1019
        DCE_TCP_RTT_P1                              1
        RATE_REDUCE_MONITOR_PERIOD_P1               4
        INITIAL_ALPHA_VALUE_P1                      1023
        MIN_TIME_BETWEEN_CNPS_P1                    4
        CNP_802P_PRIO_P1                            6
        CNP_DSCP_P1                                 48
        CLAMP_TGT_RATE_AFTER_TIME_INC_P2            True(1)
        CLAMP_TGT_RATE_P2                           False(0)
        RPG_TIME_RESET_P2                           300
        RPG_BYTE_RESET_P2                           32767
        RPG_THRESHOLD_P2                            1
        RPG_MAX_RATE_P2                             0
        RPG_AI_RATE_P2                              5
        RPG_HAI_RATE_P2                             50
        RPG_GD_P2                                   11
        RPG_MIN_DEC_FAC_P2                          50
        RPG_MIN_RATE_P2                             1
        RATE_TO_SET_ON_FIRST_CNP_P2                 0
        DCE_TCP_G_P2                                1019
        DCE_TCP_RTT_P2                              1
        RATE_REDUCE_MONITOR_PERIOD_P2               4
        INITIAL_ALPHA_VALUE_P2                      1023
        MIN_TIME_BETWEEN_CNPS_P2                    4
        CNP_802P_PRIO_P2                            6
        CNP_DSCP_P2                                 48
        ROCE_RTT_RESP_DSCP_P1                       0
        ROCE_RTT_RESP_DSCP_MODE_P1                  DEVICE_DEFAULT(0)
        ROCE_RTT_RESP_DSCP_P2                       0
        ROCE_RTT_RESP_DSCP_MODE_P2                  DEVICE_DEFAULT(0)
        PORT_OWNER                                  True(1)
        ALLOW_RD_COUNTERS                           True(1)
        RENEG_ON_CHANGE                             True(1)
        TRACER_ENABLE                               True(1)
        ROCE_CONTROL                                ROCE_ENABLE(2)
        PCI_WR_ORDERING                             per_mkey(0)
        MULTI_PORT_VHCA_EN                          False(0)
        PF_SD_GROUP                                 0
        BOOT_VLAN                                   1
        LEGACY_BOOT_PROTOCOL                        PXE(1)
        BOOT_INTERRUPT_DIS                          False(0)
        BOOT_LACP_DIS                               True(1)
        BOOT_VLAN_EN                                False(0)
        IP_VER                                      IPv4(0)
        BOOT_UNDI_NETWORK_WAIT                      0
        BOOT_DBG_LOG                                False(0)
        BOOT_PKEY                                   0
        UEFI_HII_EN                                 True(1)
        UEFI_LOGS                                   DISABLED(0)
        DYNAMIC_VF_MSIX_TABLE                       False(0)
        EXP_ROM_UEFI_ARM_ENABLE                     False(0)
        EXP_ROM_UEFI_x86_ENABLE                     True(1)
        EXP_ROM_PXE_ENABLE                          True(1)
        ADVANCED_PCI_SETTINGS                       False(0)
        SAFE_MODE_THRESHOLD                         10
        SAFE_MODE_ENABLE                            True(1)

Hi leuchtt,

NVIDIA ConnectX-4 Lx Ethernet Adapter Cards User Manual
nvidia-connectx-4-lx-ethernet-adapter-cards-for-ocp-3-0-user-manual.0 User Manual.pdf

You can have a look at the 2 documents above, in the “Features and Benefits” section, we can see the Wake-on-lan and Reset-on-Lan features are only introduce in CX4-Lx OCP models, but not in CX4-Lx PCI models.
And I check the 14.32.1900 version FW files of MCX4121A-ACH_Ax, the underlayer WOL config parameter is not there. This means you can not configure the WOL_MAGIC_EN mlxconfig option.

The link https://network.nvidia.com/files/doc-2020/pb-connectx-4-lx-en-card.pdf you shared is about both CX4-Lx and CX4-Lx OCP, so it listed the Wake-On-LAN in it(but only support on OCP models only).

Thanks!

1 Like

I see, thank you for the effort of going through all these documents, I had not noticed that small but important detail, though I find it kind of misleading by NVIDIA then. Anyway the help is much appreciated.

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