Xaivier AGX cannot link to FPGA without PHY

[Xwln]

Hello NVIDIA Developers,
I have a problem connecting Ethernet via RGMII from Jetson Xavier AGX module to FPGA without PHYs.The specific connections are as follows:

In order to obtain RGMII clock signals from AGX, I modified the device tree according to the posthttps://forums.developer.nvidia.com/t/xavier-agx-mac-to-mac-connection-with-zynqmp/168020.

However, the AGX and FPGA devices are not linked.
the modify of my Xavier device tree for the EQOS is following:

I wonder to know why I cannot link the devices? Is there anything else I need to do?

Any help or feedback would be greatly apprecited.

Thanks!

[kayccc]

Sorry for the late response, have you managed to get issue resolved or still need the support? Thanks

[Xwln]

I already resolved the issue. FPGA needs transfer rd_clk to AGX.