Xavier AGX doesn't see NVMe drive

I installed a NVMe M.2 drive and it doesn’t get discovered by the OS. If I use a PCIe to M2 card, with an M.2 NVMe drive installed, the OS sees it fine.

What can I do to troubleshoot this?


Please connect your card back to m.2 slot and share the dmesg.

Also, tell us what card you are using. Thanks.

lspci_xavier.txt (1.7 KB) dmesg_xavier.txt (81.0 KB)


I moved the card from the PCIe slot into the internal M.2 slot and don’t have the PCIe card installed. I am attaching the lspci -vvv output as well as the dmesg.


Bump - is there anything else you need?

Can you give info about the jetpack release (4.3 / 4.4 ??) and BSP versions (32.x.x ??)
Also, when it does come up through the PCIe to M.2 card, could you please share the dmesg log and ‘sudo lspci -vv’ output?

Hello, the Xavier is on jetpack 4.4. I am not sure how to get the BSP version so I included a listing of all nvidia packages below. I guess I am on BSP32.4.4.

root@dev-xavier-01:/data/stargate/data_service_cupy# dpkg -l |grep -i nvidia
ii cuda-nvtx-10-2 10.2.89-1 arm64 NVIDIA Tools Extension
ii libnvidia-container-tools 0.9.0~beta.1 arm64 NVIDIA container runtime library (command-line tools)
ii libnvidia-container0:arm64 0.9.0~beta.1 arm64 NVIDIA container runtime library
ii libvisionworks arm64 NVIDIA’s VisionWorks Library and supplemental data
ii libvisionworks-dev all Development files for NVIDIA’s VisionWorks Library
ii libvisionworks-samples arm64 Samples for NVIDIA’s VisionWorks Library
ii libvisionworks-sfm arm64 SFM module for NVIDIA’s VisionWorks Library
ii libvisionworks-sfm-dev arm64 Development files for SFM module for NVIDIA’s VisionWorks Library
ii libvisionworks-tracking arm64 Tracking module for NVIDIA’s VisionWorks Library
ii libvisionworks-tracking-dev arm64 Development files for Tracking module for NVIDIA’s VisionWorks Library
ii nvidia-container-csv-cuda 10.2.89-1 arm64 Jetpack CUDA CSV file
ii nvidia-container-csv-cudnn arm64 Jetpack CUDNN CSV file
ii nvidia-container-csv-tensorrt arm64 Jetpack TensorRT CSV file
ii nvidia-container-csv-visionworks arm64 Jetpack VisionWorks CSV file
ii nvidia-container-runtime 3.1.0-1 arm64 NVIDIA container runtime
ii nvidia-container-toolkit 1.0.1-1 arm64 NVIDIA container runtime hook
ii nvidia-docker2 2.2.0-1 all nvidia-docker CLI wrapper
iU nvidia-l4t-3d-core 32.4.4-20201027211332 arm64 NVIDIA GL EGL Package
ii nvidia-l4t-apt-source 32.4.4-20201016123640 arm64 NVIDIA L4T apt source list debian package
iU nvidia-l4t-bootloader 32.4.4-20201027211332 arm64 NVIDIA Bootloader Package
iU nvidia-l4t-camera 32.4.4-20201027211332 arm64 NVIDIA Camera Package
ii nvidia-l4t-configs 32.4.4-20201016123640 arm64 NVIDIA configs debian package
ii nvidia-l4t-core 32.4.4-20201016123640 arm64 NVIDIA Core Package
iU nvidia-l4t-cuda 32.4.4-20201027211332 arm64 NVIDIA CUDA Package
iU nvidia-l4t-firmware 32.4.4-20201027211332 arm64 NVIDIA Firmware Package
iU nvidia-l4t-graphics-demos 32.4.4-20201027211332 arm64 NVIDIA graphics demo applications
ii nvidia-l4t-gstreamer 32.4.4-20201016123640 arm64 NVIDIA GST Application files
ii nvidia-l4t-init 32.4.4-20201016123640 arm64 NVIDIA Init debian package
ii nvidia-l4t-initrd 32.4.4-20201016123640 arm64 NVIDIA initrd debian package
ii nvidia-l4t-jetson-io 32.4.4-20201016123640 arm64 NVIDIA Jetson.IO debian package
iU nvidia-l4t-jetson-multimedia-api 32.4.4-20201027211332 arm64 NVIDIA Jetson Multimedia API is a collection of lower-level APIs that support flexible application development.
iU nvidia-l4t-kernel 4.9.140-tegra-32.4.4-20201027211332 arm64 NVIDIA Kernel Package
iU nvidia-l4t-kernel-dtbs 4.9.140-tegra-32.4.4-20201027211332 arm64 NVIDIA Kernel DTB Package
iU nvidia-l4t-kernel-headers 4.9.140-tegra-32.4.4-20201027211332 arm64 NVIDIA Linux Tegra Kernel Headers Package
iU nvidia-l4t-multimedia 32.4.4-20201027211332 arm64 NVIDIA Multimedia Package
iU nvidia-l4t-multimedia-utils 32.4.4-20201027211332 arm64 NVIDIA Multimedia Package
ii nvidia-l4t-oem-config 32.4.4-20201016123640 arm64 NVIDIA OEM-Config Package
iU nvidia-l4t-tools 32.4.4-20201027211332 arm64 NVIDIA Public Test Tools Package
iU nvidia-l4t-wayland 32.4.4-20201027211332 arm64 NVIDIA Wayland Package
iU nvidia-l4t-weston 32.4.4-20201027211332 arm64 NVIDIA Weston Package
iU nvidia-l4t-x11 32.4.4-20201027211332 arm64 NVIDIA X11 Package
ii nvidia-l4t-xusb-firmware 32.4.4-20201016123640 arm64 NVIDIA USB Firmware Package

The LSPCI and dmesg outputs are attached 3 messages up.


Yes. It is 32.4.4
I was asking for the dmesg and ‘sudo lspci -vv’ when the link comes up. I think the attached logs are when the link didn’t come up.

OK. I will add the PCIe card back on and move the M2 card to it.


Here are the new lspci and dmesg outputs

lspci_with_pcie.txt (15.8 KB) dmesg_with_pcie.txt (106.4 KB)

bump - any ideas?

I’m not really sure what the issue is here. Logs are not indicating anything at this point. Could you please try the following patch? I added delays in all crucial places. Please try the below patch and update your observations.

diff --git a/drivers/pci/dwc/pcie-tegra.c b/drivers/pci/dwc/pcie-tegra.c
index 6f3919f85..6b6c3c82e 100644
--- a/drivers/pci/dwc/pcie-tegra.c
+++ b/drivers/pci/dwc/pcie-tegra.c
@@ -2652,7 +2652,7 @@ static int tegra_pcie_dw_host_init(struct pcie_port *pp)
        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
        struct tegra_pcie_dw *pcie = dw_pcie_to_tegra_pcie(pci);
        u32 val, tmp;
-       int count = 200;
+       int count = 1000;

        if (tegra_platform_is_fpga()) {
                /* Program correct VID and DID on FPGA */
@@ -2839,6 +2839,9 @@ static int tegra_pcie_dw_host_init(struct pcie_port *pp)

        clk_set_rate(pcie->core_clk, GEN4_CORE_CLK_FREQ);

+       pr_info("Adding 500ms delay before applying PERST\n");
+       msleep(500);
        /* assert RST */
        val = readl(pcie->appl_base + APPL_PINMUX);
        val &= ~APPL_PINMUX_PEX_RST;
@@ -2856,7 +2859,7 @@ static int tegra_pcie_dw_host_init(struct pcie_port *pp)
        val |= APPL_PINMUX_PEX_RST;
        writel(val, pcie->appl_base + APPL_PINMUX);

-       msleep(100);
+       msleep(500);

        val = readl(pci->dbi_base + CFG_LINK_STATUS_CONTROL);
        while (!(val & CFG_LINK_STATUS_DLL_ACTIVE)) {