I got some questions about the Power-Down Sequence.
On Power-Down after SHUTDOWN-REQ* is asserted low, I need to deassert POWER_EN as soon as possible with a maximum possible delay of 10us.
What will happen if I am not able to deassert POWER_EN in the given time?
In case of a Sudden Power Loss Shutdown I must guarantee that for 10ms VDD_IN doesn’t fall below 3V.
What does the NX do in that given time?
What will happen if I can’t maintain the 3V on VDD_IN?
Is the Power Consumption reduced in those 10ms?
After POWER_EN is deasserted the SYS_RESET* Signal will be asserted by the module.
Does that always happen?
What is the delay between “POWER_EN is deasserted” and “SYS_RESET* is asserted”.
Thank you in advance.