SHUTDOWN_REQ# question

I see alot of questions related to this, but I don’t see mine exactly.

In Xavier NX Design Guide is says “If SHUTDOWN_REQ* is asserted, the carrier board must de-assert POWER_EN as soon as possible.” Questions:

what is “as soon as possible”? Figure 5-4 shows no timing
how long does it need to stay de-asserted?
Consider the case that Carrier Board board power is suddenly interrupted.

What are the implications on the Xavier module of not meeting this spec? Can it get locked up or other made inoperable?

Looking at the SHUTDOWN_REQ# explanation further: "One reason for this is to give the system enough time to do a correct power down sequence in the case of a sudden power loss case. In this case, once the 5V supply drops to ~4.2 V, the on-module VIN_PWR_BAD_N signal is asserted which results in HUTDOWN_REQ*
being asserted. The PMIC then starts the power down sequence which takes ~4 to 5 ms. The sequence must finish before the input voltage drops below 3.0 V to correctly power off the module

Comment: there is no mention in the role of deasserting POWER_EN in this process. Seems the key requirement is to keep Vin > 3.0V for 4-5ms.

Under what specific kind of situation would a “failed power down sequence” cause the module not to reboot. Thanks

Hi, figure 5-6 give the >10ms timing from POWER_EN de-asserted to voltage drop to 3.0V.

OK, I think I understand this timing now.

If Vcc drops too fast and the module can’t complete a proper shutdown, what can happen?

As said in DG: To satisfy the power down sequencing requirement and prevent unwanted back drive from the carrier board to the module.

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