About CSI_TRACE_LOG

I’m currently trying to activate the DPHY RAW sensor on Orin, but it’s not going smoothly. Upon inspecting the logs, it seems that nvcsi hasn’t correctly identified the DPHY MIPI signal. However, based on my software simulation design, there shouldn’t be any issues with my chip design. From the MIPI waveforms captured by the oscilloscope, there don’t appear to be significant issues either. However, I’m having trouble understanding the meaning of the logs. Could you explain it to me in detail? The more detailed, the better. Thank you.
csi_dphy.txt (8.9 MB)

hello 541449841,

your tracing log show lots of PHY interrupts, which means something wrong (check below analysis) in the very beginning stage, hence, there’s no frame packet has arrived.

you’ve several PHY interrupts,
here’re some analysis of PHY interrupts with error code.
0x10000000: error has detected in the PHY partition that some lanes detected sync word while other lanes not.
0x44 and 0x4: these two are reported there’re more than one bit error has detected on the data-lane.

according to above,
it’s more like hardware issue, for instance, please double check sensor hardware configuration to output frames correctly.

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thank you,I get it.

hello Jerry,
How about 0x02 and 0x20 mean? I often encounter these two errors as well.

hello 541449841,

0x20 and 0x02: it means one bit error has detected on the data-lane.
for instance,
0x20 it reports one bit error has detected on the data-lane 1.
0x02 it reports one bit error has detected on the data-lane 0.

they’re similar to 0x44 and 0x4.
so, if more than one bit error has detected, the error code has changing to 0x44 and 0x4.

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