In camera development document, it metion the AGX Orin support maximum of 16 virtual channels with ISP, or 24 virtual channels without ISP.
We see the virtual channel need the Aggregator 0 unit in diagram.
May I to know what is the Aggregator 0? it is a chipset? or it is block in AGX Orin?
If the Aggregator 0 is a chipset, Could you provide which chipset model support AGX Orin?
https://docs.nvidia.com/jetson/archives/r34.1/DeveloperGuide/text/SD/CameraDevelopment/JetsonVirtualChannelWithGmslCameraFramework.html#jetson-agx-orin
It’s a bridge like GMSL chip Max9295/Max9296.
Does the camera sensor driver need implement to support virtual channel? or only setting MAX9295/MAX9296 driver support virtual channel?
Just configure the bridge only.
Thanks
In the other hand, if our application is HDMI input to MIPI-CSI output, and it not GMSL.
What the bridge chipset could support virtual channel?
Maybe you can check with HDMI-IN chip if support VC.
Or do some research like FPD link. Sorry don’t have much information for that.
OK, Thank you.
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