AGX Orin PCIE configuration failed

Autonomous Machines Jetson & Embedded Systems Jetson AGX Orin
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1

Hello nv team:
We designed a carrier board for Orin.We used three PCIE interfaces, but one of them defaults to a USB3.0 interface and the other defaults to a 10 Gigabit Ethernet port. We need to modify the underlying driver to change them to PCIE interfaces. We did a series of work but still failed.as shown in the following figure,We need to configure the two interfaces marked in red as PCIE interface.

image
image718×887 144 KB

We did the following work specifically.
1.Find the p3701.conf.common file in /nvidia/nvidia_sdk/JetPack_5.1_Linux_JETSON_AGX_ORIN_TARGETS/Linux_for_Tegra. In line 165 of the file find ODMDATA= “gbe-uphy-config-22,hsstp-lane-map-3,nvhs-uphy-config-0, hiso-uphy-config-0,gbe0-enable-10g”. Modify it to: ODMDATA= “gbe-uphy-config-0,hsstp-lane-map-3,nvhs-uphy-config-0, hiso-uphy-config-16”;

2.Modify the pinmux file. Here is the pinmux file before and after the change
before:tegra234-mb1-bct-pinmux-p3701-0000-a04(back).dtsi.txt (64.6 KB)
tegra234-mb1-bct-gpio-p3701-0000.dtsi (3.9 KB)
after:tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi.txt (64.6 KB)
tegra234-mb1-bct-gpio-p3701-0000-a04.dtsi.txt (3.8 KB)

After doing the above two works, Orin still cannot detect PCIE devices. May I ask if the above modification is wrong or there are other configuration items that need to be modified.thank you!

3

You should read this document to enable C0 and C7.
https://docs.nvidia.com/jetson/archives/r35.4.1/DeveloperGuide/text/HR/JetsonModuleAdaptationAndBringUp/JetsonAgxOrinSeries.html?highlight=pcie#enable-pcie-in-a-customer-cvb-design

There is no need to change pinmux when configure pcie and usb things. You need to modify kernel dts.

4

Hi Wayne.
Thank you for your reply.Now I have modified the device tree, ODMDATA and pinmux based on the documents you provided. However, after flashing into ORIN, it turned out that ORIN cannot boot into the system.We did the following work specifically.

  1. ODMDATA= “gbe-uphy-config-22,hsstp-lane-map-3,nvhs-uphy-config-0, hiso-uphy-config-0,gbe0-enable-10g”. Modify it to: ODMDATA= “gbe-uphy-config-0,hsstp-lane-map-3,nvhs-uphy-config-0, hiso-uphy-config-16”;

  2. Modify the definitions of PEX_L*_CLKREQ_N and PEX_L*_RST_N in the pinmux file；

  3. Download the Driver Package (BSP) Sources, find tegra234-p3737-pcie.dtsi, and add the following code and compile the kernel to get the tegra234-p3701-0000-p3737-0000.dtb file；
    pcie@14180000 {
    status = “okay”;
    phys = <&p2u_hsio_0>;
    phy-names = “p2u-0”;
    };

    pcie@141e0000 {
    status = “okay”;
    num-lanes = <8>;
    phys = <&p2u_gbe_0>, <&p2u_gbe_1>, <&p2u_gbe_2>,
    <&p2u_gbe_3>, <&p2u_gbe_4>, <&p2u_gbe_5>,
    <&p2u_gbe_6>, <&p2u_gbe_7>;
    phy-names = “p2u-0”, “p2u-1”, “p2u-2”, “p2u-3”,
    “p2u-4”, “p2u-5”, “p2u-6”, “p2u-7”;
    };

  4. After the device is flashed into the orin module, it cannot boot into the system, and the power consumption of the orin module is very high. Connect to the orin debug port to obtain the following log information.
    bootdebug_log.doc (152.5 KB)
    Please help me to check the possible reasons for my inability to enter the system and whether my modification steps are wrong,thank you!

5

Please enable UEFI log by rebuilding the UEFI binary from github.

6

Hi Wayne.
Please tell me exactly how I should operate.thank you.

7

There is no update from you for a period, assuming this is not an issue any more.
Hence we are closing this topic. If need further support, please open a new one.
Thanks

Which part needs guidance…?