Orin pcie c0 and c7 issue

my base board + orin(64GBVersion),add 2 pcie2ethernet card
eth1:UPHY_TX0/RX0—>UPHY0 (C0@14180000), hsio-uphy-config-16
eth2:UPHY_TX7/RX7—>UPHY2 (C7@141e0000),gbe-uphy-config-0
1.for design, modify p3701.conf.common:

 # Common values and/or defaults across P3701:

-ODMDATA="gbe-uphy-config-22,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-0,gbe0-enable-10g";
+ODMDATA="gbe-uphy-config-0,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-0";

2.dtb and kernel modify:
hardware/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-pcie.dtsi
hardware/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-0000-a04.dtsi
hardware/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-pcie.dtsi:
— a/source/hardware/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-pcie.dtsi
+++ b/source/hardware/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-pcie.dtsi
@@ -40,6 +40,20 @@
“p2u-5”, “p2u-6”, “p2u-7”;
};

  •    pcie@14180000 {
    
  •            status = "okay";
    
  •            nvidia,disable-power-down;
    
  •            phys = <&p2u_hsio_0>;
    
  •            phy-names = "p2u-0";
    
  •    };
    
  •    pcie@141e0000 {
    
  •            status = "okay";
    
  •            nvidia,disable-power-down;
    
  •            phys = <&p2u_gbe_5>;
    
  •            phy-names = "p2u-5";
    
  •    };
    
  •   pcie_ep@141a0000 {
              status = "disabled";
    

gpio config:

> --- a/bootloader/tegra234-mb1-bct-gpio-p3701-0000-a04.dtsi
> +++ b/bootloader/tegra234-mb1-bct-gpio-p3701-0000-a04.dtsi
> @@ -76,8 +76,6 @@
>                                 TEGRA234_MAIN_GPIO(K, 7)
>                                 TEGRA234_MAIN_GPIO(L, 2)
>                                 TEGRA234_MAIN_GPIO(L, 3)
> -                               TEGRA234_MAIN_GPIO(AG, 0)
> -                               TEGRA234_MAIN_GPIO(AG, 1)
>                                 TEGRA234_MAIN_GPIO(AG, 2)

Blockquote

final, sudo ./flash.sh jetson-agx-orin-devkit mmcblk0p1
Uploading: tegra234-bpmp-3701-0005-3737-0000.dtb.log…
Uploading: tegra234-bpmp-3701-0005-3737-0000.dts.log…
Uploading: tegra234-ethernet-3737-0000.dtsi.log…
Uploading: tegra234-mb1-bct-gpio-p3701-0000-a04.dtsi.log…
Uploading: tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi.log…

board power on, lspci -v:


cat /sys/kernel/debug/bpmp/debug/uphy/config:
0x40000000

tegra234-p3737-0000-a04.dtsi.log (8.8 KB)
tegra234-p3737-pcie.dtsi.log (2.1 KB)

You told us you know which ODMDATA to set.
But when it really comes to bring it up, you didn’t set the ODMDATA as what you said… so what do you want here…??


l think ODMDATA value is Ok. But l don’t kown how to check ODMDATA by cat /sys/kernel/debug/bpmp/debug/uphy/config. Also pinmux is:
图片
图片

I have a qustion, I must need by Jetson_AGX_Orin_Series_Pinmux_Config_Template_1.9.xlsm generate diy xx.pinmux.dtsi/xx.gpio.dtsi or direct to change tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi and tegra234-mb1-bct-gpio-p3701-0000-a04.dtsi.

可能我用中文講比較清楚…

兩個錯誤

  1. 你一開始就提到C0要設定成 hsio-uphy-config-16

結果你設定根本就沒寫這個…

-ODMDATA=“gbe-uphy-config-22,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-0,gbe0-enable-10g”;
+ODMDATA=“gbe-uphy-config-0,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-0”;

  1. 為什麼你的 pcie@141e0000要寫<&p2u_gbe_5>? 你的hardware設計是如何?

谢谢!
1、C0设置已经改成 hsio-uphy-config-16:
#ODMDATA=“gbe-uphy-config-22,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-0,gbe0-enable-10g”;
ODMDATA=“gbe-uphy-config-0,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-16”;
2、板子设计使用的是UPHY Lane5,所以猜测应该是p2u_gbe_5。我还原回去

你的設計是沒辦法用的, 只有放在UPHY2, Lane 0或是UPHY2, Lane 7會動… C7是PCIe x8的設定…

C0可以检测到设备,C7有问题
0x40000000a-agx-orin:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/uphy/config
root@nvidia-agx-orin:/home/nvidia#
root@nvidia-agx-orin:/home/nvidia# dmesg |grep pcie
[ 6.621684] tegra194-pcie 14180000.pcie: Adding to iommu group 9
[ 6.634846] tegra194-pcie 14180000.pcie: Using GICv2m MSI allocator
[ 6.642751] tegra194-pcie 14100000.pcie: Adding to iommu group 10
[ 6.655118] tegra194-pcie 14100000.pcie: Using GICv2m MSI allocator
[ 6.662148] tegra194-pcie 14160000.pcie: Adding to iommu group 11
[ 6.674631] tegra194-pcie 14160000.pcie: Using GICv2m MSI allocator
[ 6.681483] tegra194-pcie 141a0000.pcie: Adding to iommu group 12
[ 6.693648] tegra194-pcie 141a0000.pcie: Using GICv2m MSI allocator
[ 6.700128] tegra194-pcie 141a0000.pcie: Failed to get slot regulators: -517
[ 6.700242] tegra194-pcie 141e0000.pcie: Adding to iommu group 13
[ 6.712481] tegra194-pcie 141e0000.pcie: Using GICv2m MSI allocator
[ 6.719160] tegra194-pcie 141e0000.pcie: Failed to get PHY: -19
[ 8.004280] tegra194-pcie 14180000.pcie: Using GICv2m MSI allocator
[ 8.013775] tegra194-pcie 14180000.pcie: host bridge /pcie@14180000 ranges:
[ 8.024383] tegra194-pcie 14180000.pcie: IO 0x0038100000…0x00381fffff → 0x0038100000
[ 8.033065] tegra194-pcie 14180000.pcie: MEM 0x2728000000…0x272fffffff → 0x0040000000
[ 8.041758] tegra194-pcie 14180000.pcie: MEM 0x2440000000…0x2727ffffff → 0x2440000000
[ 8.157929] tegra194-pcie 14180000.pcie: Link up
[ 8.163882] tegra194-pcie 14180000.pcie: PCI host bridge to bus 0000:00
[ 8.352046] pcieport 0000:00:00.0: Adding to iommu group 9

There is no update from you for a period, assuming this is not an issue any more.
Hence we are closing this topic. If need further support, please open a new one.
Thanks

Is this still an issue to support? Any result can be shared?