AGX Xavier DP0 to HDMI output

We try to setup AGX Xavier DP0 to HDMI output on our customer carrier board.
I see &head0 map to &sor2, &head1 map to &sor0, &head3 map to &sor1 in tegra194-p2822-disp.dtsi.
How to setup AGX Xavier DP0 to HDMI ? head0? head1? head2?
Could I only to change &sor0 to hdmi?

&head0 { status = "okay";
	nvidia,fb-bpp = <32>;
	nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered */ nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
	win-mask = <0x3>;
	nvidia,fb-win = <0>;
	nvidia,dc-connector = <&sor2>;
	nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
	avdd_hdmi-supply = <&p2888_spmic_sd0>; /* 1v0 */
	avdd_hdmi_pll-supply = <&p2888_spmic_sd1>; /* 1v8 */
	vdd_hdmi_5v0-supply = <&p2822_vdd_hdmi_5v0>; /* 5v0 */ };

&head1 { status = "okay";
	nvidia,fb-bpp = <32>;
	nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered */ nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
	win-mask = <0xC>;
	nvidia,fb-win = <2>;
	nvidia,dc-connector = <&sor0>;
	nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
	vdd-dp-pwr-supply = <&p2888_spmic_sd0>;
	avdd-dp-pll-supply = <&p2888_spmic_sd1>;
	vdd-edp-sec-mode-supply = <&battery_reg>;
	vdd-dp-pad-supply = <&battery_reg>;
	vdd_hdmi_5v0-supply = <&p2822_vdd_hdmi_5v0>; };

&head2 { status = "okay";
	nvidia,fb-bpp = <32>;
	nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered */ nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
	win-mask = <0x30>;
	nvidia,fb-win = <4>;
	nvidia,dc-connector = <&sor1>;
	nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
	vdd-dp-pwr-supply = <&p2888_spmic_sd0>;
	avdd-dp-pll-supply = <&p2888_spmic_sd1>;
	vdd-edp-sec-mode-supply = <&battery_reg>;
	vdd-dp-pad-supply = <&battery_reg>;
	vdd_hdmi_5v0-supply = <&p2822_vdd_hdmi_5v0>; };

&sor0 {
  status = "okay";
  nvidia,active-panel = <&sor0_dp_display>;
 };

&sor0_dp_display { 
  status = "okay";
  nvidia,is_ext_dp_panel = <1>; 
};

&sor1 { 
  status = "okay";
  nvidia,active-panel = <&sor1_dp_display>; 
};

&sor1_dp_display {
  status = "okay";
  nvidia,is_ext_dp_panel = <1>; 
};

&sor2 { 
  status = "okay";
  nvidia,active-panel = <&sor2_hdmi_display>; 
};

&sor2_hdmi_display { 
  status = "okay";
  disp-default-out { nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_LOW>; }; 
};

Original device tree already provided 2 DP and 1 HDMI as sample. If you want to change some DP to HDMI, refer to that HDMI one as example and modify the device tree.

SOR ahd nvdisplay head mapping could be configured freely too.

I had chang sor0 to sor0_hdmi_display, but AGX Xavier DP0 still no HDMI output.

&sor0 { status = "okay";
	nvidia,active-panel = <&sor0_hdmi_display>;
 };

&sor0_hdmi_display { 
  status = "okay";
  disp-default-out { nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_LOW>; }; 
};

Your dmesg will tell more detail. We cannot know what is going on with only this device tree change.

I attached my dmesg log (dmesg_20240409_01.txt)
dmesg_20240409_01.txt (111.8 KB)

[   21.231086] tegradc 15200000.display: hdmi: edid read failed
[   21.231328] tegradc 15200000.display: hdmi: using fallback edid
[   21.231427] tegradc 15200000.display: blank - powerdown

I am not sure why you are attaching the 15200000. Your sor0 is on 15210000

[ 8.064117] tegradc 15210000.display: disp1 connected to head1->sor
[ 24.969859] tegradc 15210000.display: blank - powerdown

And looks like hotplug is not detected.

May I to know how to check HDMI hotplug detect issue?
I check the DP0_HPD had enable in tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg now.

pinmux.0x02440030 = 0x00000450; # dp_aux_ch0_hpd_pm0: dp, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable

As I already said, you have another sample as you reference.

For example, check the default software setting on Devkit HDMI port.

Your pinmux and device tree shall be similar to that port. HPD pin for a HDMI hotplug should be GPIO but not SFIO.

After review pinmux and re-flash image, the DP0 could get HDMI output now.
Thanks for your support.

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