As default settings, HDMI is used on dp1, how to change the settings to use HDMI on dp0?
wellens_kuo,
Which BSP are you using? r28 or r24? It would require to change from dts.
Dear WayneWWW,
We are using r28.
Please take a look at “tegra210-jetson-cv-base-p2597-2180-a00.dts” and
- modify the “nvidia,dc-or-node” node in tegradc.0 to “/host1x/sor1”.
- Disable status of tegradc.1
- Enable “dpaux” status.
- Check if those regulators like “avdd_hdmi-supply”, “avdd_hdmi_pll-supply” is needed on your board. If yes, please also move these from tegradc.1 to tegradc.0.
Dear WayneWWW,
We tried it, but it does not work.
The status at our dts
host1x {
dc@54200000 {
status = "okay";
};
dc@54240000 {
status = "disabled";
};
sor {
status = "disabled";
};
sor1 {
status = "okay";
};
dpaux {
status = "okay";
};
dpaux1 {
status = "okay";
};
};
tegradc.0 and tegradc.1 at “tegra210-jetson-cv-base-p2597-2180-a00.dts”
/* tegradc.0 */
dc@54200000 {
status = "okay";
nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
nvidia,emc-clk-rate = <300000000>;
nvidia,fb-bpp = <32>; /* bits per pixel */
nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
nvidia,dc-or-node = "/host1x/sor1";
};
/* tegradc.1 */
dc@54240000 {
status = "disabled";
nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
nvidia,emc-clk-rate = <300000000>;
nvidia,cmu-enable = <1>;
nvidia,fb-bpp = <32>; /* bits per pixel */
nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
nvidia,dc-or-node = "/host1x/sor1";
};
The regulators at “jetson-platforms/tegra210-jetson-common-power-tree-p2530-0930-e03.dtsi”
/* tegradc.1 */
dc@54240000 {
avdd_dsi_csi-supply = <&max77620_gpio7>;
avdd_lcd-supply = <&vdd_disp_3v0>;
dvdd_lcd-supply = <&max77620_sd3>;
vdd_lcd_bl_en-supply = <&lcd_bl_en>;
vdd_lcd_bl-supply = <&vdd_3v3>;
};
/* tegradc.0 */
dc@54200000 {
avdd_hdmi-supply = <&max77620_ldo8>; /* 1V05 */
avdd_hdmi_pll-supply = <&max77620_sd3>; /* 1V8 */
vdd_hdmi_5v0-supply = <&vdd_hdmi>; /* 5V0 GPIO_PCC7 fixed reg */
};
Attach our dts temp file
dtb.dts.tmp.log (1.19 MB)
How is the dmesg? Does it start to detect HDMI on tegradc.0?
Please note that the runtime device tree can be checked under /proc/device-tree. Please review it first.
There is the dmesg message.
debug.log (54.6 KB)
There is no tegradc node in your log. I guess it is not enabled at all.
Please check your runtime DT.
which device node we should check under /proc/device-tree ?
We tried it that can run on the tx1 kit, but not on our carrier board. The result we want should be the opposite.
On our carrier board, HDMI is removed to dp0 pin.
Hi Wayne,
-
the data flow should be tegradcx → sor0 → dp0 . refer to below block diagram.
http://www.cospandesign.com/ProjectsDocuments/nvidia/TX2%20Host1X%20Display%20Subsystem.png -
If we want to use dp0 as HDMI out why need to change the config likes you said?
modify the “nvidia,dc-or-node” node in tegradc.0 to “/host1x/sor1”.
anything mistook?
H Jesse,
Yes, your flow is correct.
If it can work on devkit but not your board, the next step is to use sor0 in dc-or-node.
Please note that prod setting may not include in sor0 node and you need to copy it from sor1.
The prod setting is in "tegra210-jetson-cv-prods.dtsi "
Hi Wayne,
are you sure? Can you help check if TX1 supports DP0 as HDMI output? does anyone make this success?
In fact, sor0 and sor1 capability on TX1 are not the same, that is why we always use sor1 for HDMI or DP.
To be honest, we didn’t test HDMI on DP0 so cannot give you any guarantee.
However, if it is TX2, then we can promise it should work.
Thank you for your honesty.
BTW, if you already had a carrier board, you can give it a try.
There is no tegradc node in your previous log. This indicates the dts setting is not correct.
What I said in #14 is that we don’t cover this is our support scope. But it may still have chance.