I can not reduce the SPI frequency below 3.3MHz.
I changed
static __initdata struct tegra_clk_init_table ardbeg_clk_init_table
{
…
…
{ “sbc1”, “pll_p”, 3300000, false},
}
in file board-ardbeg.c
As soon as I reduce 3300000 to 1000000 I see a bump in the frequency to 30MHz.
I saw same issue where someone was complaining about the SPI frequency:
https://devtalk.nvidia.com/default/topic/850638/jetson-tk1-unable-to-reduce-spi-clock-below-3-2mhz/
But there is no workaround posted. Please help ASAP.