Desgin MIPI 2 lane on Orin NX

We plan to design FPGA output two video stream by MIPI 2 lanes to Orin NX on our customer carrier board.
FPGA Video 1 to Orin NX CSI ports:
CSI0 D0
CSI0 D1
CSI0 CLOCK

FPGA Video 2 to Orin NX CSI ports:
CSI2 D0
CSI2 D1
CSI2 CLOCK

May I confirm with you this CSI design is ok for Orin NX?
Video1 need CSI0 CLOCK or CSI1 CLOCK?
Video2 need CSI2 CLOCK or CSI3 CLOCK?

Hi @sammyb7qw7

The Jetson Orin NX can support up to “four 2-lane configurations”. They have 4 set of CSI signals:

  • CSI0 D0-D1-CLK
  • CSI1 D0-D1-CLK
  • CSI2 D0-D1-CLK
  • CSI3 D0-D1-CLK

So you can have up to four 2-lane ports to connect MIPI devices and receive video streaming.
If you plan to use CSI0 D0/D1 you would need the CSI0 CLOCK, the same case for the CSI2 D0/D1, you would need the CSI2 CLOCK.

For more information, you can find the Orin NX datasheet here

Best Regards,

Enrique Ramirez
Embedded SW Engineer at RidgeRun
Contact us: support@ridgerun.com
Developers wiki: https://developer.ridgerun.com
Website: www.ridgerun.com

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