MIPI 4 lane CSI-0 and CSI-2 can't get video on Orin NX

Autonomous Machines Jetson & Embedded Systems Jetson Orin NX
1

Our FPGA output 2 channel (MIPI 4 lanes) to Orin NX CSI-0, CSI-2 on our Orin NX customer board.

Orin-NX_MIPI_4lane
Orin-NX_MIPI_4lane947×507 45.6 KB

Orin NX can’t video0 and video1 by bus-width=<4>.

fpga_a@32 {
  port-index = <0>;
  bus-width = <4>;
  tegra_sinterface = "serial_a";
  lane_polarity = "6";
}

fpga_b@44 {
  port-index = <2>;
  bus-width = <4>;
  tegra_sinterface = "serial_c";
  lane_polarity = "0";
}

But we try configure FPGA to output 2 channel (MIPI 2 lanes) to Orin NX CSI-0, CSI-2.
Orin NX could get video-0 and video-1 by bus-width=<2>.

fpga_a@32 {
  port-index = <0>;
  bus-width = <2>;
  tegra_sinterface = "serial_a";
  lane_polarity = "6";
}

fpga_b@44 {
  port-index = <2>;
  bus-width = <2>;
  tegra_sinterface = "serial_c";
  lane_polarity = "0";
}

May I to know how to get MIPI 4 lanes on Orin NX?
How to narrow down the issue?

3

Please check the trace log to check if any clue.

BringUp

4

If I send below /nvcsi/mrq_rate_locked=1 command, and Orin NX will get MIPI 4 lanes x2ch video ok.
echo 1 > /sys/kernel/debug/bpmp/debug/clk/nvcsi/mrq_rate_locked

If I don’t send /nvcsi/mrq_rate_locked=1 command after Orin NX power on, and it will can’t get MIPI 4 lanes x2ch video.
May I to know why?

5

That could be the pix_clk_hz/serdes_pix_clk_hz too small to acquire the NVCSI/VI bandwidth.

7

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