Device Tree Overlay- Jetson Orin Nano

ajin.a · October 6, 2025, 10:06am

Hello !!

I am working with the Jetson Orin Nano development kit with Jetpack 6.2.1. Please see the device tree I used to connect a external device.

/dts-v1/;
/plugin/;
/ {
jetson-header-name = “Jetson 40pin Header”;
overlay-name = “external-peripheral”;
compatible = “nvidia,p3768-0000+p3767-0005”;


fragment@0 {
	target = <&pinmux>;

	__overlay__ {
	pinctrl-names = "default";
	pinctrl-0 = <&jetson_io_pinmux>;
	jetson_io_pinmux: exp-header-pinmux {
		hdr40-pin13 {
			nvidia,pins= "spi3_sck_py0";
			nvidia,function = "spi3";
			nvidia,tristate= <0x00>;
			nvidia,enable-input = <0x01>;
		};
		hdr40-pin16 {
			 nvidia,pins= "spi3_cs1_py4";
                            nvidia,function = "spi3";
                            nvidia,tristate= <0x00>;
                            nvidia,enable-input = <0x01>;
		};
		hdr40-pin18 {
			 nvidia,pins= "spi3_cs0_py3";
                            nvidia,function = "spi3";
                            nvidia,tristate= <0x00>;
                            nvidia,enable-input = <0x01>;
		};
		hdr40-pin22 {
			 nvidia,pins= "spi3_miso_py1";
                            nvidia,function = "spi3";
                            nvidia,tristate= <0x00>;
                            nvidia,enable-input = <0x01>;
		};
		hdr40-pin37 {
			 nvidia,pins= "spi3_mosi_py2";
                            nvidia,function = "spi3";
                            nvidia,tristate= <0x00>;
                            nvidia,enable-input = <0x01>;

		};

	};
};


};
fragment@1 {
target = <&spi3>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
mm6108:mm6108@0{
compatible=“morse,mm610x-spi”;
reg=<0>;
spi-max-frequency = <50000000>;
spi-irq-gpios = <&gpio 105 0x0>;
reset-gpios = <&gpio 41 0x0>;
power-gpios = <&gpio 144 0x0>,<&gpio 0x0>;
status = “okay”;
};
};
};
};

After compiling the .dts file to a .dtbo file, I moved it into the /boot directory. Then jetson-io.py is used to reconfigure the Jetson 40pin Header. But, when I checked the compatible property from /sys/firmware/devicetree/base/bus@0/spi@3230000/spi@0/compatible, it was not updated.

What step would I be missing here?
Do I need to add pinmux settings for each GPIOs configured inside SPI such as power-gpio, reset-gpio etc.

If so what nvidia,property I need to give to the GPIOs ? gp?

I couldn’t figure out spi3 node from /hardware/nvidia/t23x/nv-public files. If the node I used in device tree is not correct, how can I find out the exact node for spi@3230000 (Spi3) , so that I can overlay compatible property?

The references I used are Device tree overlay help for SPI <> CAN driver and Configuring the Jetson Expansion Headers — Jetson Linux Developer Guide documentation
Thanks,

WayneWWW · October 7, 2025, 3:23am

I think the problem here is you think moving to /boot will take effect, but it seems not.

What did you do in above step?

ajin.a · October 7, 2025, 7:00am

Thanks,
The properties are updated after I execute the steps.
sudo cp ~/my-overlay.dtbo /boot
sudo /opt/nvidia/jetson-io/config-by-hardware.py -n “external-peripheral”
reboot

Can you answer the second question I have asked?
" Do I need to add pinmux settings for each GPIOs configured inside SPI such as power-gpio, reset-gpio etc."

Because the state of these gpios is showing as unsused when i checked through jetson.io and gpioinfo.

WayneWWW · October 7, 2025, 7:07am

I am not quite sure about what you are ask here. Do you mean the pinmux of the pins inside of spi@xxxx node in the device tree?

ajin.a · October 7, 2025, 7:25am

yes Exactly.

In the SPI node, I have GPIO pins defined for power and reset(using power-gpios and reset-gpios). Those pins are used to connect to the external peripheral along with SPI pins.
Would I have to configure the pinmux for these GPIO pins in the device tree overlay .
If so what is the nvidia,function value be for these GPIO pins?

WayneWWW · October 7, 2025, 7:35am

Hi,

You are actually asking two separate questions here.

Device tree does not take effect.
Whether GPIO inside of the SPI node needs to get configured.

For (1), putting device tree into /boot is not sufficient. Jetson IO shall change the content inside of /boot/extlinux/extlinux.conf so that device tree will be read from rootfs.

For (2), yes, ideally you shall configure every pinmux of each pin correctly before using it.

ajin.a · October 15, 2025, 11:34am

Thanks.
The gpios defined inside spi node are not getting into the default state.

Please see the device tree I am using now.

/dts-v1/;
/plugin/;

/ {
	overlay-name = "My Jetson Overlay Example";
	jetson-header-name= "Jetson 40pin Header";
	compatible = "nvidia,p3768-0000+p3767-0005";

	fragment@0 {
target-path = "/bus@0/spi@3230000/spi@0";
__overlay__ {
		status = "disabled";
};
};
	fragment@1 {
target = <&pinmux>;
		__overlay__ {
		pinctrl-names = "default";
		pinctrl-0 = <&jetson_io_pinmux>;
		jetson_io_pinmux: exp-header-pinmux {
			hdr40-pin13 {
				nvidia,pins= "spi3_sck_py0";
				nvidia,function = "spi3";
				nvidia,tristate= <0x0>;
				nvidia,enable-input = <0x1>;
			};
			hdr40-pin16 {
				 nvidia,pins= "spi3_cs1_py4";
                                nvidia,function = "spi3";
                                nvidia,tristate= <0x0>;
                                nvidia,enable-input = <0x1>;
			};
			hdr40-pin18 {
				 nvidia,pins= "spi3_cs0_py3";
                                nvidia,function = "spi3";
                                nvidia,tristate= <0x0>;
                                nvidia,enable-input = <0x1>;
			};
			hdr40-pin22 {
				 nvidia,pins= "spi3_miso_py1";
                                nvidia,function = "spi3";
                                nvidia,tristate= <0x0>;
                                nvidia,enable-input = <0x1>;
			};
			hdr40-pin37 {
				 nvidia,pins= "spi3_mosi_py2";
                                nvidia,function = "spi3";
                                nvidia,tristate= <0x0>;
                                nvidia,enable-input = <0x1>;
			};
                        hdr40-pin29 {
                                nvidia,pins= "soc_gpio32_pq5";
                                nvidia,tristate= <0x00>;
                                nvidia,enable-input = <0x01>;
                        };

};
};
};

	fragment@2 {
		target-path = "/bus@0/spi@3230000";
		__overlay__ {
			status = "okay";
					#address-cells = <1>;
			#size-cells = <0>;
			mm6108:mm6108@0 {
				compatible = "morse,mm610x-spi";
				reg=<0>;
				spi-max-frequency=<50000000>;
				spi-irq-gpios = <&gpio 125 0x0>; // PQ.05
			//	reset-gpios = <&gpio 54  0x0>; // PG.06
			//	power-gpios = <&gpio 166 0x0>,<&gpio 126 0x0>; // PAC.06, PQ.06		

status = "okay";
			};
		};
	};
};

Please see below line inside device tree used to configure PQ.05 GPIO :
spi-irq-gpios = <&gpio 125 0x0>;

I have calculated the second argument125 by:
define TEGRA234_MAIN_GPIO_PORT_Q 15
define TEGRA234_MAIN_GPIO(port, offset)
((TEGRA234_MAIN_GPIO_PORT#port * 8) + offset)

Using this Equation, I got
15*8+5 = 125

I have used third argument as 0x0 because it stands for GPIO_ACTVE_HIGH

I have defined the PQ.06 in the pinmux node too. I didnt get the nvidia,funtion to assign to this pin inside pinmux node as GPIO.Anyway, the PQ.05 pin state is not able to control from device tree. Where am I missing?

WayneWWW · October 15, 2025, 11:42am

Using this Equation, I got
15*8+6 = 125

The calculation might not be correct. You should compile it from source code with TEGRA234_MAIN_GPIO(Q, 5).

ajin.a · October 15, 2025, 12:43pm

Yes.
I actually want to do from dts overlay. I got these values from Linux_for_Tegra/source/kernel_out/hardware/nvidia/t23x/nv-public/include/kernel/dt-bindings/gpio/tegra234-gpio.h.

Can you share documents to work on it? I couldn’t find it.

WayneWWW · October 15, 2025, 12:45pm

I am not quite sure what kind of document do you want here.
I mean, what I told is you should just use some string like “TEGRA234_MAIN_GPIO(Q, 5)” in your device tree. Just like every of our dts file in the kernel source code did.
For example, you won’t see our dts file directly gives a number like “125”… we all write it in “TEGRA234_MAIN_GPIO(XXXX)” form.

ajin.a · October 16, 2025, 4:08pm

Okay.
When the kernel communicates with the external device after applying the device tree, the CLK signal amplitude does not reach 3.3 V, and the MISO signal does not appear as a pulse. Is there any additional configuration needed in the SPI node of the device tree?
I can attach the waveforms for reference.

WayneWWW · October 17, 2025, 2:57am

Could we get you final dts that actually runs on the board?

ajin.a · October 17, 2025, 6:45am

Please see this:

extracted_proc.dts.txt (313.7 KB)

KevinFFF · October 17, 2025, 3:17pm

Hi ajin.a,

Please remove the following part in the spi@3230000 node of your device tree.

			prod-settings {
				#prod-cells = <0x04>;

				prod {
					prod = <0x00 0x194 0x80000000 0x00>;
				};
			};

			mm6108@0 {
				spi-max-frequency = <0x2faf080>;
				compatible = "morse,mm610x-spi";
				status = "okay";
				reg = <0x00>;
				phandle = <0x37a>;
				spi-irq-gpios = <0xf3 0x7d 0x00>;
			};

-			spi@0 {
-				spi-max-frequency = <0x2faf080>;
-				compatible = "tegra-spidev";
-				status = "disabled";
-				reg = <0x00>;
-
-				controller-data {
-					nvidia,enable-hw-based-cs;
-					nvidia,tx-clk-tap-delay = <0x00>;
-					nvidia,rx-clk-tap-delay = <0x10>;
-				};
-			};

It seems you want to use SPI3_CS0 for mm6108 SPI device.
You should just keep one node for that.

Please share the full dmesg to check if your driver can be probed correctly.

ajin.a · October 17, 2025, 6:20pm

Thank you. I have figured out that spi communication is woking well. Now my concern is about the spi-irq gpios property added inside the spi node.

Please see this.
spi-irq-gpios = <&gpio 125 0x0>

@WayneWWW suggested me about converting the values to Macros. But when I compile device tree I need to postprocess the device tree overlay with cpp. This replace the constants and turns out to the same values.

Even though I set the default state of spi-irq gpios as High, the pin is not getting HIGH after reboot.

In the line
spi-irq-gpios = <&gpio 125 0x0>
Please note that third argument 0x0 represents GPIO_ACTIVE_HIGH

I am using PQ. 05 and why would be the state is not changing. I want to make sure taht the gpio will function well when the kernel communicates.

ajin.a · October 21, 2025, 12:55pm

The issue has been resolved. The PQ.05 pin was configured as an input in the kernel.

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Device Tree Overlay- Jetson Orin Nano

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