Dear nVIDIA,
Now I have put my hand on a TX2-NX module to test DisplayPort(DP). On DevKit the DP output is fine but not in my custom carrier board. The monitor does not light up to show any image.
I got following kernel messages when NX module running on my custom board,
roland@ubuntu:~$ dmesg | grep display
[ 0.416142] iommu: Adding device 15200000.nvdisplay to group 29
[ 0.416450] iommu: Adding device 15210000.nvdisplay to group 30
[ 0.904725] tegradc 15200000.nvdisplay: disp0 connected to head0->/host1x/sor1
[ 0.904833] tegradc 15200000.nvdisplay: DT parsed successfully
[ 0.904855] tegradc 15200000.nvdisplay: Display dc.ffffff800abe0000 registered with id=0
[ 0.910676] tegradc 15200000.nvdisplay: vblank syncpt # 8 for dc 0
[ 0.910681] tegradc 15200000.nvdisplay: vpulse3 syncpt # 9 for dc 0
[ 0.913243] tegradc 15200000.nvdisplay: hdmi: invalid prod list prod_list_hdmi_board
[ 0.913247] tegradc 15200000.nvdisplay: hdmi: tegra_hdmi_tmds_range_read(bd) failed
[ 0.916586] tegradc 15200000.nvdisplay: probed
[ 0.916991] tegradc 15200000.nvdisplay: fb registered
[ 0.917662] tegradc 15210000.nvdisplay: disp1 connected to head1->/host1x/sor
[ 0.917870] tegradc 15210000.nvdisplay: DT parsed successfully
[ 0.917899] tegradc 15210000.nvdisplay: Display dc.ffffff800aca0000 registered with id=1
[ 0.918112] tegradc 15210000.nvdisplay: vblank syncpt # 11 for dc 1
[ 0.918118] tegradc 15210000.nvdisplay: vpulse3 syncpt # 12 for dc 1
[ 0.929191] tegradc 15210000.nvdisplay: probed
[ 0.929829] tegradc 15210000.nvdisplay: fb registered
[ 0.933858] tegradc 15210000.nvdisplay: blank - powerdown
[ 5.620531] tegradc 15200000.nvdisplay: blank - powerdown
[ 5.620540] tegradc 15210000.nvdisplay: blank - powerdown
[ 40.372705] tegradc 15210000.nvdisplay: dp: plug event received
[ 40.473869] tegradc 15210000.nvdisplay: blank - powerdown
[ 40.476156] tegradc 15200000.nvdisplay: blank - powerdown
[ 40.476183] tegradc 15210000.nvdisplay: blank - powerdown
[ 40.496467] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.498394] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.500839] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.522994] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.525646] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.526916] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.535038] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.536743] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.539483] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.545214] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.546884] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.550764] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.554609] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.558404] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.565274] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.565280] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565285] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565290] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565295] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565301] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565306] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565311] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565316] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565321] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565326] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565331] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565336] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565341] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565346] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565350] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565355] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565360] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565364] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565370] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565375] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565379] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565384] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.565390] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565395] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.565400] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.565405] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.565410] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565415] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565420] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565425] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565430] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565435] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565440] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565445] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565450] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565455] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565460] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565465] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565470] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.565475] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 40.565480] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 40.565485] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 40.565490] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 40.565494] tegradc 15210000.nvdisplay: blank - powerdown
[ 40.621708] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.621718] tegradc 15210000.nvdisplay: unblank
[ 40.627596] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.630205] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.631452] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 5
[ 40.632697] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 4
[ 40.633987] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.642175] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.643870] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.645553] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.647264] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.648970] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.653780] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.655565] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.657270] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.661053] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.662298] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 40.666077] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.669414] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 40.673018] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.674274] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 40.678838] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.680084] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 40.684681] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.685942] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 40.690548] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.691808] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 40.696434] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.697699] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 40.702355] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 40.703628] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 40.709385] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.709390] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709395] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709400] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709405] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709410] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709414] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709419] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709424] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709429] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709433] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709438] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709443] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709448] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709452] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709457] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709462] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709467] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709471] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709476] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709481] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709486] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709491] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 40.709496] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709501] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.709507] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.709512] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 40.709517] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709521] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709526] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709531] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709536] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709541] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709546] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709551] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709556] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709561] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709566] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709571] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709576] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 40.709581] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 40.709587] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 40.709592] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 40.709597] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 40.709600] tegradc 15210000.nvdisplay: blank - powerdown
[ 40.720088] tegradc 15210000.nvdisplay: dp: irq event received
[ 45.897848] tegradc 15210000.nvdisplay: tegra_dc_reserve_common_channel: DC 1 timed out waiting for the COMMON channel
[ 45.897865] tegradc 15210000.nvdisplay: tegra_dp_irq_evt_worker: DC 1 reserve failed during DP IRQ
[ 45.908580] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 45.908590] tegradc 15210000.nvdisplay: unblank
[ 45.913059] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 45.915542] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 45.916793] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 45.924933] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 45.926690] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 45.928392] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 45.930557] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 45.934417] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 45.936759] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 45.938513] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 45.940213] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 45.944015] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 45.947765] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 45.951554] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 45.976976] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 45.977000] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977019] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 45.977037] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977053] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977069] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977085] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977101] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977117] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977133] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977148] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977164] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977179] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977194] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977210] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977226] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977242] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977257] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977273] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977289] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 45.977304] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977320] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977335] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x0 did not specify bpp
[ 45.977351] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 45.977368] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 45.977384] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 45.977401] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 45.977418] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 45.977435] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 45.977451] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 45.977468] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 45.977484] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 45.977500] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x400000 did not specify bpp
[ 45.977517] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 45.977533] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x420000 did not specify bpp
[ 45.979497] tegradc 15200000.nvdisplay: blank - powerdown
[ 45.979509] tegradc 15210000.nvdisplay: blank - powerdown
[ 46.087415] tegradc 15210000.nvdisplay: blank - powerdown
[ 46.087432] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 46.087442] tegradc 15210000.nvdisplay: unblank
[ 46.091961] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 46.094548] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 46.095801] tegradc 15210000.nvdisplay: tegra_dp_get_bpp: vmode=0x200000 did not specify bpp
[ 46.103945] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.105647] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.107344] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 46.109510] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 46.114367] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.116139] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.117839] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.121647] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.125465] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.128818] tegradc 15210000.nvdisplay: dp: aux read defer (0x10020000) -- 6
[ 46.132375] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.133625] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 46.138156] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.139402] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 46.143914] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.145159] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 46.149463] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.150710] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 46.155372] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.156624] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 46.161189] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 6
[ 46.162446] tegradc 15210000.nvdisplay: dp: aux write defer (0x10020000) -- 5
[ 46.167825] tegradc 15210000.nvdisplay: unblank
[ 46.167974] tegradc 15200000.nvdisplay: blank - powerdown
[ 46.180076] tegradc 15210000.nvdisplay: dp: irq event received
I should say it looks pretty close now, the HPD and IRQ_HPD signals are there, and
EDID of monitor has been read out indicates aux channel works properly:
But these error messages seems something internal to tegra DC:
[ 45.897848] tegradc 15210000.nvdisplay: tegra_dc_reserve_common_channel: DC 1 timed out waiting fo
r the COMMON channel
[ 45.897865] tegradc 15210000.nvdisplay: tegra_dp_irq_evt_worker: DC 1 reserve failed during DP IRQ
What is the “COMMON channel”, and what these error message implies?
They may not directly related but better understanding of these message may help me to bug out the few remaining issues faster.
Thank you.
/Roland