Hi all, I am trying to enable low temp boot on my Jetson Orin nano 8 GB dev-kit
I edited tegra234-mb1-bct-misc-p3767-0000.dts , but after flashing using sdkmanager i get the same term shock waring and termtrip enabling:
‣ Task: Thermal check
Using min_chip_limit as min_tmon_limit
Using max_chip_limit as max_tmon_ limit
BCT max_tmon_limit = 105
BCT min tmon_limit = -28
BCT max_tmon_limit = 105
BCT min_tmon_limit = -28
SKU specific max_chip_limit = 105
SKU specific win_chip_limit = -28
BCT max_ chip_limit = 105
BCT min_chip_limit = -28
enable_soctherm_polling = 0
max temp read = -29
min temp read = -30
Enabling thermtrip
What should i do to enable low term loading?
Hi pushkinforever,
What’s the Jetpack version in use?
What temperature do you mean about low temp?
What had you updated in this device tree file?
Please share the full flash and serial console log for further check.
I want to change values:
SKU specific max_chip_limit = 105
SKU specific win_chip_limit = -28
BCT max_ chip_limit = 105
BCT min_chip_limit = -28
What should I do?
And how i rebuild boot/system images.
I am flashing via SDKManager, but suddenly i started to get usb writing timeout error (on the same devkit/board/module/cabel).
Jetpack 6.2.2.
UPD:
So, I’m looking at the UART boot log during the flashing process and see the following after my changes:
Task: Thermal check
Task 0x21 failed (err: 0x50b)
After which the flashing process stops and, after a while, Ubuntu boots. I rolled back the changes and the flashing process completed successfully. It looks like I need to either disable this check or change something else.
Do you mean there’s the boot issue after updating the following lines in tegra234-mb1-bct-misc-p3767-0000.dts?
///////// SOCTHERM ///////////
soctherm {
max_chip_limit = <0x69>;
min_chip_limit = <0xFFFFFFE4>;
};
May I know the use case and the reason for this modification?
Please provide this information for further check.
Yes, I modified this section in:
tegra234-mb1-bct-misc-common.dtsi
tegra234-mb1-bct-misc-p3767-0000.dts
///////// SOCTHERM ///////////
soctherm {
max_chip_limit = <0x69>;
min_chip_limit = <0xFFFFFFE4>; // 0xFFFFFFC4
};
Flash_1… and nv_uart_2026_03_09_145405 faild flash logs after modifying.
(Original) - uart log of flashing pure 6.2.2 jetpach
I want to use jetson orin nano modules in cold environment, so i need to change this software settings. I understand, thay it could potentially harm modules, but i need to check this experimental.
flash_1-5_0_20260309-150603.log (5.5 KB)
nv_uart_2026_03_09_145405.log (118.2 KB)
nv_uart_2026_03_07_121603(original).log (119.0 KB)
Changing the boot temp threshold is not allowed and also your change won’t take affect.
Why its not allowed?
So what should i do if i want to use modules in above -28 environment?
Instead of modifying the chip limit, you should try to enable that “enable_soctherm_polling” setting.
This one will make SoC keeps rebooting until the chip get over -28C situation and then boot up. (keeps rebooting warms up the chip)
Your previous attempt to modify chip limit is in vain because there is software check to prevent you doing that.
Where could this setting be?
add it to tegra234-mb1-bct-misc-p3767-0000.dts like
disable_sc7 = <0>;
enable_tsec = <0>;
enable_4pin_ram_code = <1>;
+ enable_soctherm_polling = <1>;
Thx, i’ll try, as soon as possible
nv_uart_2026_03_09_161252.log (116.1 KB)
SDKM_logs_JetPack_6.2.2_Linux_for_Jetson_Orin_Nano_[8GB_developer_kit_version]_2026-03-09_16-12-15.zip (1.5 MB)
Flashing faild.
For some reason soctherm polling is still 0
But due loading it seems that bootloader detected modified DT
Upd:
I rolled back dts, flashing successful.
I need to unlock the ability to edit bootloader parameters.
What is the exact content you have in tegra234-mb1-bct-misc-p3767-0000.dts?
I add the same line as you suggested
Did you revert your change that adjust the therm temperature?
Yes, the only change fir now is:
enable_soctherm_polling = <1>;
When i comment this, flashing is fine