Figure 6-3 Power Sequencing update 10-2023

Autonomous Machines Jetson & Embedded Systems Jetson Orin NX
1

Hi,

Is there a chance I could get clarification on why the SOM power sequencing Figure 6-3 requirement was updated? Up until now it has required a 400ms delay on the POWER_EN line from the startup of VDD, and now it seems that it can be immediate.

3

Because the pmic inside is changed.