I’m working on a custom carrier board for my jetson nano and I’m digging into CSI camera connectors. I’m following the documentation here https://developer.nvidia.com/nvidia-jetson-nano-and-jetson-xavier-nx-camera-design-guide.
in table 3-1, all the CSI connections on the carrier board are listed, but I think there’s some error regarding the N/P notation on the “Signal Name” column. I wasn’t sure on how to connect my camera, so I used a multimeter to test connections on the board itself and it looks like the camera connector on A02 carrier board connects to CSI2 interface on the nano (as opposed to the document saying CSI0).
That said I’m not sure about the camera clock lines: according to the multimeter, pin 8 on the connector is attached to pin 30 on the nano SODIMM, while pin 9 is attached to pin 28. As per my understanding, these pins should be connected the other way around as specified by the CSI specification: pin 28 is CSI2_CLK_N (and should connect to pin 8 on the CSI connector), while pin 30 is CSI2_CLK_P (should connect to pin 9).
I’m probably missing something, but I tried testing everything I could without actually connecting external wires to my board (the camera connector on the carrier is working perfectly fine).
How should I wire the clock lines in order to have it working?
thank you in advance
I am not sure about your question. In table 3-1, it already tells it is CSI0 port, where do you get CSI2? Also the pin 8 of connector is “Not used”.
I’m sorry, my question was based more on my multimeter testing than the document itself. I was actually referring to pins 15 and 17 on table 3-1 (which are the 8th and 9th pins, my bad).
I found the connector is attached to CSI2 using the multimeter and checking individual pins.
I’m referring to the Jetson Nano SODIMM pinout in chapter 14 of this document https://developer.nvidia.com/embedded/dlc/jetson-nano-product-design-guide
The exact connection I found directly testing the pins is the following:
As you can see, pins 15 and 17 look flipped: it looks like they’re connected respectively to pins 30 and 28, while they should be connected to 28 and 30.
I don’t know if I’m wrong at some point, but everything looks good except for these two pins. There should be no components between the camera connector and the SODIMM socket (except for I2C on pins 25 and 27), so I think my readings are correct.
If there’s anything I couldn’t be able to explain, please tell me, this point is critical for my project,
thank you very much,
I think you mixed A02 and B01 info. The product design guide is for B01 only. Just following table 3-1 in nvidia-jetson-nano-and-jetson-xavier-nx-camera-design-guide will be OK.
I thought the only difference between B01 and A02 was the I/O on the carrier board. If I understand correctly you’re saying the SODIMM pinout is different between the two, so the module itself is different. If so, what is the pinout of the A02 module?
SODIMM pinout is different. The full pinout of A02 is not released. All nano docs in DLC are for B01, custom design should follow that.
This explains everything,
thank you very much