Get 200MHz arm frequency when using dpdk on dpu

[markchen7788]

Do Arm cores have low frequecy?We get the 2.75GHz arm frequency from dpu documents(https://docs.nvidia.com/networking/display/BlueField2DPUENUG)

But I got 200MHz when using dpdk-l2fwd as these pictures have showed.

[jubetz]

Hi Mark. Interesting finding. What does the output of dmidecode |grep - speed look like on your setup?

[markchen7788]

This is what it looks like on DPU.

And This is what it looks like on my x86 pc.

[xiaofengl]

What DPDK version you used? rte_get_tsc_hz() is to read X86 TSC register, measured frequency of the RDTSC counter. There is no TSC to use on AARCH64 need ASM porting. looks like this DPDK API not working well, just read system counter CNTFRQ_EL0 or wrong PMU counter. anyway, it is DPDK API issue.

[markchen7788]

Currently 20.11.3.Thanks for your reply.That’s very helpful!!!

[xiaofengl]

There is no much change of implement for rte_tsc_hz(), from DPDK20.xx to current latest 22.xx, AARCH64 need hardware support PMU, and define marco to use ARM64 PMU get procise clock. The RTE_ARM_EAL_RDTSC_USE_PMU is not enable default, so just read system counter “asm volatile(“mrs %0, cntfrq_el0” : “=r” (freq));”, not like the TSC procise on X86.

dpdk source/config/arm/meson.build

dodk source/lib/librte_eal/arm/rte_cycles.c

get_tsc_freq_arch(void)
{
#if defined RTE_ARCH_ARM64 && !defined RTE_ARM_EAL_RDTSC_USE_PMU
return __rte_arm64_cntfrq();
#elif defined RTE_ARCH_ARM64 && defined RTE_ARM_EAL_RDTSC_USE_PMU
#define CYC_PER_1MHZ 1E6
/* Use the generic counter ticks to calculate the PMU
* cycle frequency.
*/
uint64_t ticks;
uint64_t start_ticks, cur_ticks;
uint64_t start_pmu_cycles, end_pmu_cycles;

/** Read generic counter frequency */
static __rte_always_inline uint64_t
__rte_arm64_cntfrq(void)
{
uint64_t freq;

asm volatile("mrs %0, cntfrq_el0" : "=r" (freq));
return freq;

}

[xiaofengl]

X86 implement very simple, just read MSR and calculate TSC counter base on CPU model.

__cpuid(0x1, a, b, c, d);
model = rte_cpu_get_model(a);

if (check_model_wsm_nhm(model))
	mult = 133;
else if ((c & bit_AVX) || check_model_gdm_dnv(model))
	mult = 100;
else
	return 0;

ret = rdmsr(0xCE, &tsc_hz);
if (ret < 0)
	return 0;

return ((tsc_hz >> 8) & 0xff) * mult * 1E6;