I have a plate setup which connects an ORIN dev carrier board’s (from seeed studios) HDMI to an Artix dev carrier board’s (from digilent) HDMI input. In the schematics of both there is significant circuitry between the IO and the actual HDMI connectors. On the carrier board there are inductor and resistor nets that the signals pass through, as well as 2 of these chips: TPD4E02B04DQAR tied to the various data signals. On the Artix side there is a AD8195ACPZ interface IC. My question is: does one of these circuits undo the effect of the other? Can I simply route the HDMI signals directly from the ORIN SODIMM to the IO of the FPGA? What voltage levels are the HDMI signals operating at?
I can’t answer that, but I’ll add something: You’ll also need the FPGA to send EDID data for the Jetson driver to configure to (the DDC wire). This is i2c, and is normally triggered when the HDMI provides power to a monitor’s i2c during a hot plug. Basically, if your signals are correct, then you’ll also need to make sure the EDID read of the DDC wire is triggered and powered.
Noted, and thank you.
I will make sure that whatever my final solution is this point is observed.
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