How to enable different clocks for MIPI DSI

Robotics & Edge Computing Jetson Systems Jetson TX2
1

Hello! I wanted to know how can I enable different clocks for MIPI DSI. I found that on display DTSI file there is a parameter: nvidia,out-parent-clk = "pll_d"; - I thought that changing pll_d to a different clock - ex. pll_e would work because I wanted to have lower MIPI clock rate. However it seems that most clocks are disabled by default? How can I enable them?

cat /sys/kernel/debug/clk/pll_d/clk_enable_count is 4 while
cat /sys/kernel/debug/clk/pll_e/clk_enable_count is 2 and it doesn’t work, if I replace pll_d with pll_e in device tree.

3

Any advice?

4

Generally there should be a “possible_parents” node inside each of client. For example, sor has such node and it can change parent clock from that list. I am not sure about DSI. If there isn’t this, then may not able to configure.

5

I can’t seem to find any possible_parents node anywhere on the kernel. The only thing about clocks that DSI has, is:

	dsi {	/* dsi@15300000 */
			nvidia,dsi-controller-vs = <DSI_VS_1>;
			status = "disabled";
			panel-s-wuxga-8-0 {
				...
				disp-default-out {
					nvidia,out-parent-clk = "pll_d";

image

6

Yes, you cannot find it because it is in bpmp, not in kernel.

/sys/kernel/debug/bpmp

7 
root@tx2nx:/sys/kernel/debug/bpmp/debug/clk/dsi# ls
dvfs  max_rate  min_rate  mrq_rate_locked  parent  rate  state
root@tx2nx:/sys/kernel/debug/bpmp/debug/clk/dsi# cat parent
pll_d_out1

Yeah, so it seems DSI can only work with pll_d clocks unfortunately :(