Impedance controller for PCIe USB and MIPI

Hi Nvidias:
I’m working on Jetson ORI NX custom board design ,my referrence file was P3768_A04, which was last updated on Feb 22 2023,and I found in user design guide,PCIe needs 85 / 50 for differential / Single Ended, USB needs 90 for differential , MIPI needs 90-100 / 45-50 for differential / Single Ended.
but in the referrence brd file ,both PCIe and USB and MIPI take the same 0.103 mm segment width ,0.263mm differential gap, does this matters?
How can I control impedence for those high speed interface?

Please check with PCB vendor for impedence control. And refer to the routing guideline in DG for SI spec.

Yes,I will confirm with our local vendor(I think this is not the point), but I want to make sure :
1: If the PCB brd file I reffered is correct(the lattsest release by NV);
2:Why the brd file use same constrain for different impedence control ,if I give the Gerber file to PCB vendor,they will ask me the same question;
3:Can USB PCIe MIPI use the same 90/45 Ω Diff pair / SE impedence control?

Hi, your custom design only needs to follow the Design Guide. No need to check that of devkit carrier board.

That’s abnormal, I designed our custom board beside on the official design,but you could not tell me if the reffered design is ok.
The advice from your side is to follow design guide, so the file I reffered is not correct?

I want to clarify that I checked the design rule because I am preparing a manufacture rule for our local vendor .
We need to tell the PCB vendor which line should control impedence, so I put the line width spacing message to an excel,after I write down all our differential pair, I noticed those three group use the same constrain rule, so I returned to the official brd,it’s the same.
I am just want to make sure if that matter for those three group, in DG ,both USB and MIPI can take 90 Ω ,only PCIe need 85Ω,the diffrence is so little.
I think the impedence continouse is the most important ,but we don’t have a simulated environment for SI to validate the guess,maybe you can give me some useful advice.

The tolerance is +/-15% as you can see in the Design Guide.

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