We have a custom board on which we have provided an m.2 key M connector for using an NVME SSD. We referred the Xavier NX Carrier Board Schematics for the same. The pin number 44 on the m.2 key M is an alert signal from the m.2 device to the host. On the NX, the pin on the module is shared with the SDIO_D1 line. We have done the same on our custom board, and we have the M2M_ALERT to the SDIO_D1 with a 0 Ohm resistor.
From searching online it seems to be “Alert notification to host system. Open Drain with pull up on platform; Active Low Signals”.
We plan to connect a peripheral to the SDIO interface and still want to use the NVME SSD. I have the following questions. Would be grateful if these get answered:
- Where is the SDIO_D1 connected on the NX Devkit board?
- If we use the SDIO interface, do we have to connect a different pin of the Nano to the M2M_ALERT?
- Can the M2M_ALERT of the m.2 key m connector be left not connected?
- Does the NVME driver use the M2M_ALERT?
- Is the device tree involved in making use of the M2M_ALERT?