Jetson AGX Orin 1G PHY Configuration


We developed our own carrier. Adapt orin.
I was going to use 1G PHY, but I couldn’t configure it properly,
My carrier uses 1G PHY and PCIE in Configuration #2 mode.

I have a few questions now:

1.How to check if my pinmux configuration works and is correct?

2.How should I configure my device tree?

3.This is my ethernet device tree configuration, should I add a new node configuration here (1G PHY)? One more thing. The currently configured node ethernet@2310000 is suitable for the RGMII network configuration, but there is an exception.

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#include <dt-bindings/gpio/tegra234-gpio.h>

/ {

ethernet@6810000 {
                     status = "disabled";
            ethernet@6910000 {
                     status = "disabled";
            ethernet@6A10000 {
                     status = "disabled";
            ethernet@6B10000 {
                     status = "disabled";
/* EQOS */
ethernet@2310000 {
	status = "okay";
	nvidia,mac-addr-idx = <0>;
                            nvidia,mac-platform-mtu = <8000>;
                            nvidia,pause_frames = <0>;
	nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G, 5) 0>;
	phy-mode = "rgmii-id";
                            phy-handle = <&phy>;
	/delete-node/ fixed-link;
                                    speed = <0x3e8>;
	mdio {
		compatible = "nvidia,eqos-mdio";
		#address-cells = <1>;
		#size-cells = <0>;

		phy: phy@1 {        /* phy@1*/

			reg = <1>;     /*reg = <1>; */
			nvidia,phy-rst-pdelay-msec = <224>; /* msec */
			nvidia,phy-rst-duration-usec = <10000>; /* usec */
			/*interrupt-parent = <&tegra_main_gpio>;
                                                            interrupts = <TEGRA234_MAIN_GPIO(G,4) IRQ_TYPE_LEVEL_LOW>;
			marvell,reg-init = <0x03 0x12 0x7fff 0x880>;*/


Do I need to change the corresponding pinmux and device tree configuration after using configuration #2? I see a default value for pinmux in the official documentation. I just need to change ODMDATA.

Why filing duplicated topic?

This is not a RGMII issue, this is a 1G PHY and PCIE configuration issue.

I have two ports on my pad, the other one is the RGMII configuration,


Just a clarification first. Do you want to connect a PCIe device, or you want to connect a ethernet phy…?

They are totally different.

If it is a PCIe device, then you totally no need to refer to 10GBE or any ethenret node. They are not related.

Map the “UPHY_RX0/TX0” pin to 1G PHY for use

Then it is a pcie device to jetson. Not a ethernet phy. If you don’t know the difference, then I can explain.

No need to refer to any PHY document. Please refer to the PCIe part.

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