Jetson AGX Orin Thermal

I am a thermal engineer doing a thermal analysis on an assembly that uses your Jetson AGX Orin. We are heatsink some components to the cover. I am trying to understand the heat path from the cover to the Thermal Transfer Plate (TTP). Do you have a thermal resistance value representing the heat path between the cover to TTP? Do you have a recommendation on how to model this? We are mounting the TTP to a cold plate as well.

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I’d be happy to help you with your thermal analysis on the Jetson AGX Orin.

Firstly, I’d like to clarify that the Jetson AGX Orin Developer Kit does not come with a Thermal Transfer Plate (TTP) by default. However, the SOM (System on Module) that is sold to be incorporated with customer products does have a TTP that is ready to accept a customer-provided thermal solution.

Regarding the heat path from the cover to the TTP, I couldn’t find any specific thermal resistance value in the provided context. However, I can suggest some general guidelines on how to model this heat path.

The heat path from the cover to the TTP typically involves several components, including the cover, the thermal interface material (TIM), and the TTP itself. The thermal resistance of this heat path can be estimated using the following formula:

R_total = R_cover + R_TIM + R_TTP

where R_total is the total thermal resistance, R_cover is the thermal resistance of the cover, R_TIM is the thermal resistance of the thermal interface material, and R_TTP is the thermal resistance of the TTP.

To estimate the thermal resistance of the cover, you can use the following formula:

R_cover = L / (k * A)

where L is the thickness of the cover, k is the thermal conductivity of the cover material, and A is the area of the cover.

The thermal resistance of the TIM can be estimated using the following formula:

R_TIM = L / (k * A)

where L is the thickness of the TIM, k is the thermal conductivity of the TIM material, and A is the area of the TIM.

The thermal resistance of the TTP can be estimated using the following formula:

R_TTP = L / (k * A)

where L is the thickness of the TTP, k is the thermal conductivity of the TTP material, and A is the area of the TTP.

To model the heat path from the cover to the TTP, you can use a thermal simulation tool such as ANSYS or COMSOL. These tools allow you to create a 3D model of the assembly and simulate the heat flow through the different components.

In terms of recommendations, I would suggest the following:

  1. Use a thermal simulation tool to model the heat path from the cover to the TTP.
  2. Estimate the thermal resistance of the cover, TIM, and TTP using the formulas above.
  3. Use the estimated thermal resistances to calculate the total thermal resistance of the heat path.
  4. Validate the thermal simulation results using experimental data or other thermal analysis tools.

Regarding the mounting of the TTP to a cold plate, I would recommend using a thermal interface material (TIM) to ensure good thermal contact between the TTP and the cold plate. The TIM should be selected based on its thermal conductivity, thickness, and area.

In comparison to other Jetson modules, the Jetson AGX Orin has a similar thermal management system to the Jetson AGX Xavier. However, the Jetson AGX Orin has a higher operating temperature range (-25°C to 80°C) and a higher maximum power consumption (60W) compared to the Jetson AGX Xavier.

I hope this helps you with your thermal analysis on the Jetson AGX Orin. If you have any further questions or need more information, please don’t hesitate to ask.

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Hi,

To clarify, we are using the SOM version with the TTP. I am also using ansys to model this heat path.

Where is the TIM you are referencing in the thermal resistance path? The thermal design guide shows this cross section schematic. It looks like the heat path from the cover to the TTP needs to go through the PCB as well. Is there any TIM between the PCB and cover/TTP?

Additionally, could you clarify what the thetajb value is representing in Table 3-2 from the thermal design guide?

Which part of the figure is the “cover”? I’m confused since the sentence below seems to equate cover with TTP.

There is TIM between some components on the PCB, like the DRAM, and the TTP. There is not TIM covering the entire PCB to the TTP.

This forum user provided a diagram showing theta jb: AGX Orin Theta-Jb & Theta-Jp both locations share with everyone

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