Hello! We will be mounting a PCB on the connector side (ie side opposite the TTP) of the module, then sandwiching some thermal paste (or pad) between this PCB and the Jetson (connector side), relying on heat flow through the entire thickness of the Jetson module to get to the heatsink which directly touches the Jetson’s TTP. What is the approximate thermal resistance [C/W] across the entire Jetson module so we can do some thermal design/assessments? I acknowledge the thermal resistance can change as a function of temperature and heat flow but for now we’re looking for a “stake in the ground” for an initial assessment. If there is data for thermal resistance (across the entire module) as a function of module temperature and heat flow, then we’ll definitely use that as extra credit!
The Thermal Design guide (TDG-08981-001_v1.0 October 2018) has already been reviewed and this information of thermal resistance across the entire Jetson module was not seen. Thank you!
I don’t understand what you want. Can you share a diagram for that? Basically we had provided the thermal resistance in TDG as below, which I think is enough for custom thermal design.
The diagram above shows “our-PCB” and “our-TIM” mounted on the bottom surface of the Jetson module, opposite the TTP end. Heat flows from “our-PCB,” through “our-TIM,” through the (unlabeled) bottom part of the Jetson, through the PCB, then in parallel paths to the HS_TIM/TTP interface through three paths
TTP walls 2) black IC then blue TIM and 3) SoC.
We are looking for the thermal resistance between the bottom surface “T,b” and the TTP surface “T,ttp”, ie the theta_bp thermal resistance across the entire Jetson.
Secondary thoughts (I could be wrong here but maybe worth a shot):
Assuming that the dominant heat flow from the PCB to the HS_TIM/TTP interface is through the SoC path (as the SoC is the greatest heat source) the following relation may (or may not) be true:
theta_bp = theta_bj + theta_jp .
If theta_bj is available, that might be helpful if theta_bp is not available.
There is no such thermal resistance can be provided as the heat source is different b/w your case and Xavier module thermal design. The current resistance in TDG is for SoC as heat source only. And so I don’t think theta_bp = theta_bj + theta_jp is correct for your case.
Thanks for clarifying this, that theta_bj = theta_jb = 5.5 [C/W], as there was no picture showing this, nor an explanation of this in the Thermal Design Guide other than in the notes of Table 3-1 which still does not describe exactly where theta_jb is:
“The theta_jb value is provided for simulation of the Jetson AGX Xavier module as a 2-resistor model in commercial CFD packages.”
Perhaps the next revision of the Thermal Design Guide can include a picture (such as below) showing where theta_jb is?
I appreciate all your quick support - thanks again!
