Hi,
I used the UART4_RX pin on our custom board as a one-way receive.
UART4_RX protocol as UART422.
I will provide my schematic below to describe pin usage:
Here’s how I do it:
****1. I configured the serial@3100000 node in the device tree source file and changed it to status = “okay”; And then I flash it.
“tegra234-soc-uart.dtsi”
uarta: serial@3100000 {
compatible = "nvidia,tegra194-hsuart";
iommus = <&smmu_niso0 TEGRA_SID_NISO0_GPCDMA_0>;
dma-coherent;
reg = <0x0 0x03100000 0x0 0x10000>;
reg-shift = <2>;
interrupts = <0 TEGRA234_IRQ_UARTA 0x04>;
nvidia,memory-clients = <14>;
dmas = <&gpcdma 8>, <&gpcdma 8>;
dma-names = "rx", "tx";
clocks = <&bpmp_clks TEGRA234_CLK_UARTA>,
<&bpmp_clks TEGRA234_CLK_PLLP_OUT0>;
clock-names = "serial", "parent";
resets = <&bpmp_resets TEGRA234_RESET_UARTA>;
reset-names = "serial";
/*status = "disabled";*/
status = "okay";
};
****2. I wrote a small program to receive serial port,Using the serial assistant to communicate on PC, but my custom board can not receive.
#include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include <termios.h>
#include <unistd.h>
int main() {
int fd;
struct termios options;
fd = open("/dev/ttyTHS3", O_RDWR | O_NOCTTY);
if (fd == -1) {
printf("open ttyTHS3 error");
perror("open");
exit(EXIT_FAILURE);
}
tcgetattr(fd, &options);
cfsetispeed(&options, B9600);
cfsetospeed(&options, B9600);
options.c_cflag &= ~CSIZE;
options.c_cflag |= CS8;
options.c_cflag &= ~PARENB;
options.c_cflag &= ~CSTOPB;
tcsetattr(fd, TCSANOW, &options);
char buffer[255];
while (1) {
int n = read(fd, buffer, 255);
if (n > 0) {
buffer[n] = '\0';
printf("Received data: %s", buffer);
}
}
close(fd);
return 0;
}
In the pinmux file, I changed the UART4_RX pin to “Int PU”.
UART4_RX is 1.8V pin, does the UART device pin level match this?
Hi Trumany,
I used oscilloscope measurement, signal output level is 1.8V.
I mean what the voltage level request of your UART device, is it 1.8V or 3.3V? The pin voltage should match between them.
I switched to 1.8V. I measured the pins and found that the signal level on the pin of Jetson was 1.3V, that is, the signal level after reaching the terminal was not 1.8V. I think UART4_RTS has a certain relationship with UART_CTS pin, maybe it should be disabled?
No such relationship. No need to disable.
You should check what the level is without level shift. If it is 1.8V, then it means level shift causes such drop.
When the signal from the 422PC is not connected to the Jetson UART4_RX, it is 1.8V.
It was attached to Jetson’s UART4_RX pin and pulled down to 1.3V.
So voltage drop is caused by 422 side. UART4_RX is input side, nothing to do with that. You can check the level shift load capability or 422 device side for solution.
The output level of 422 is 3.3V and remains unchanged, while the load capacity of level shift is 100mA. The same level shift is used at UART3_TX_DEBUG/UART3_RX_DEBUG (H62/K60). DEBIG-UART use is normal.
HI, can we take the next step?
GPIO state:
root@nvidia-agx-orin:/dev# cat /sys/kernel/debug/gpio | grep PH
gpio-391 (PH.00 )
gpio-392 (PH.01 )
gpio-393 (PH.02 )
gpio-394 (PH.03 |camera-control-outpu) out lo
gpio-395 (PH.04 |fixed-regulators:reg) out lo
gpio-396 (PH.05 )
gpio-397 (PH.06 |camera-control-outpu) out lo
gpio-398 (PH.07 )
Hi Trumany,
I have removed the 422 chip from the custom board and connected it directly to the associated pins of UART4, but the signal level input is still 1.2V.
So is it issue of level shift? As said, UART4_RX is input, has nothing to do with the external supply.
So, is there a problem with my device tree and pinmux configuration?
The level shift is fine, it’s 1.8V.
What is your current dmesg?
root@nvidia-agx-orin:/home/nvidia# dmesg | grep ttyTHS：
[ 8.695731] 3100000.serial: ttyTHS0 at MMIO 0x3100000 (irq = 25, base_baud = 0) is a TEGRA_UART
[ 8.712073] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 80, base_baud = 0) is a TEGRA_UART
[ 8.728360] 3130000.serial: ttyTHS3 at MMIO 0x3130000 (irq = 81, base_baud = 0) is a TEGRA_UART
Here is the full dmesg information：
dmesg.txt (69.0 KB)
