Jetson AGX Xavier receive MIPI CSI-2 without I2C from FPGA

Hi NVIDIA Developers
I would like to be able to use a Jetson AGX Xavier running R32 (release), REVISION: 5.1 to read a 2-lane MIPI CSI-2 without I2C from a Xilinx FGPA. The video is 1920 x 1080, 30fps, YUV444.
I change the cs_imx307.c driver, remove all the code about the I2C,
And create the devicenode - “/dev/video0” successfully. But i cant use the gstreamer tool get the capture from the fpga.
I use the oscilloscope measure the fpga capture singnal, and it is correct.
And the following is my devicetree , code and dmesg printing.

1.tegra194-p2822-0000-camera-csimx307-a00.dtsi

/*
 * Copyright (c) 2015-2018, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#include <t19x-common-modules/tegra194-camera-csimx307-a00.dtsi>
#include "dt-bindings/clock/tegra194-clock.h"

#define CAM0_RST_L	TEGRA194_MAIN_GPIO(H, 3)
#define CAM0_PWDN	TEGRA194_MAIN_GPIO(H, 6)
#define CAM1_RST_L	TEGRA194_MAIN_GPIO(T, 6)
#define CAM1_PWDN	TEGRA194_MAIN_GPIO(T, 5)

#define CAMERA_I2C_MUX_BUS(x) (0x1E + x)

/* camera control gpio definitions */
/ {
	gpio@2200000 {
		camera-control-output-high {
			gpio-hog;
			output-high;
			gpios = <CAM0_RST_L 0>;
			label = "cam0-rst";
		};

		camera-control-output-low {
			status = "disabled";
		};

		camera-control-input {
			status = "disabled";
		};
	};

	i2c@3180000 {
		tca9548@70 {
			compatible = "nxp,pca9548";
			reg = <0x70>;
			#address-cells = <1>;
			#size-cells = <0>;
			vcc-supply = <&p2822_vdd_1v8_cvb>;
			skip_mux_detect;
			force_bus_start = <CAMERA_I2C_MUX_BUS(0)>;
			i2c@0 {
				reg = <0>;
				i2c-mux,deselect-on-exit;
				#address-cells = <1>;
				#size-cells = <0>;
			};

		};
	  };
    };


/* camera control gpio definitions */
/ {
	i2c@3180000 {
		tca9548@70 {
			i2c@0 {
				csimx307_a@3b {
					clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>;
					clock-names = "extperiph1";
					mclk = "extperiph1";
					//reset-gpios = <&tca6408_21 0 GPIO_ACTIVE_HIGH>;
					vana-supply = <&p2822_avdd_cam_2v8>;
					//vdig-supply = <&en_vdd_sys>;
					dovdd-supply = <&p2822_vdd_1v8_cvb>;
				};
			};
		
		};
	};
};


2. tegra194-camera-csimx307-a00.dtsi

/*
 * Copyright (c) 2015-2018, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/* camera control gpio definitions */
#define CSI_ADP

/ {
	host1x {
		vi@15c10000 {
		#ifndef CSI_ADP
			num-channels = <6>;
		#else
			num-channels = <1>;
		#endif
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					e3322_vi_in0: endpoint {
						port-index = <0>;
						bus-width = <2>;
						remote-endpoint = <&e3322_csi_out0>;
						status = "okay";
					};
				};
			
			};
		};

		nvcsi@15a00000 {
		#ifndef CSI_ADP
			num-channels = <6>;
		#else
			num-channels = <1>;
		#endif
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			channel@0 {
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3322_csi_in0: endpoint@0 {
							port-index = <0>;
							bus-width = <2>;
							remote-endpoint = <&e3322_csimx307_out0>;
						};
					};
					port@1 {
						reg = <1>;
						e3322_csi_out0: endpoint@1 {
							remote-endpoint = <&e3322_vi_in0>;
						};
					};
				};
			};
		
		};
	};

	i2c@3180000 {
		tca9548@70 {
			i2c@0 {
				csimx307_a@3b {
					devnode = "video0";
					compatible = "nvidia,cs_imx307";
					reg = <0x3b>;

					/* Physical dimensions of sensor */
                    physical_w = "5.6";
                    physical_h = "3.1";

					sensor_model = "csimx307";
					use_sensor_mode_id = "false";
					dovdd-supply = <&en_vdd_cam>;
					avdd-reg = "vana";
					dvdd-reg = "vdig";
					iovdd-reg = "dovdd";

					mode0 { /* CS307_MODE_1920X1080_30FPS */
					mclk_khz = "24000";
					num_lanes = "2";
					tegra_sinterface = "serial_a";
					phy_mode = "DPHY";
					discontinuous_clk = "yes";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "1920";
					active_h = "1080";
					pixel_t = "yuv_vyuy16";
					readout_orientation = "0";
					line_length = "2200";
					inherent_gain = "1";
					mclk_multiplier = "2";
					pix_clk_hz = "74250000";

					gain_factor = "16";
					framerate_factor = "1000000";
					exposure_factor = "1000000";
					min_gain_val = "16"; /* 1.00x */
					max_gain_val = "170"; /* 10.66x */
					step_gain_val = "1";
					default_gain = "16"; /* 1.00x */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "1000000"; /* 1.0 fps */
					max_framerate = "30000000"; /* 30 fps */
					step_framerate = "1000000";
					default_framerate = "30000000"; /* 30 fps */
					min_exp_time = "13"; /* us */
					max_exp_time = "333333"; /* us */
					step_exp_time = "1";
					default_exp_time = "2495"; /* us */

					embedded_metadata_height = "0";
				};
                mode1 { /* CS307_MODE_1280X720_CROP_60FPS */
					mclk_khz = "24000";
					num_lanes = "2";
					tegra_sinterface = "serial_a";
					phy_mode = "DPHY";
					discontinuous_clk = "yes";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "1280";
					active_h = "720";
					pixel_t = "yuv_uyvy16";
					readout_orientation = "0";
					line_length = "1650";
					inherent_gain = "1";
					mclk_multiplier = "2";
					pix_clk_hz = "74250000";

					gain_factor = "16";
					framerate_factor = "1000000";
					exposure_factor = "1000000";
					min_gain_val = "16"; /* 1.00x */
					max_gain_val = "170"; /* 10.66x */
					step_gain_val = "1";
					default_gain = "16"; /* 1.00x */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "1000000"; /* 1.0 fps */
					max_framerate = "60000000"; /* 60 fps */
					step_framerate = "1000000";
					default_framerate = "60000000"; /* 60 fps */
					min_exp_time = "13"; /* us */
					max_exp_time = "166666"; /* us */
					step_exp_time = "1";
					default_exp_time = "2495"; /* us */

					embedded_metadata_height = "0";
				};
                mode2 { /* CS307_MODE_640X480_CROP_130FPS */
					mclk_khz = "24000";
					num_lanes = "2";
					tegra_sinterface = "serial_a";
					phy_mode = "DPHY";
					discontinuous_clk = "yes";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "640";
					active_h = "480";
					pixel_t = "yuv_uyvy16";
					readout_orientation = "0";
					line_length = "1100";
					inherent_gain = "1";
					mclk_multiplier = "2";
					pix_clk_hz = "74250000";

					gain_factor = "16";
					framerate_factor = "1000000";
					exposure_factor = "1000000";
					min_gain_val = "16"; /* 1.00x */
					max_gain_val = "170"; /* 10.66x */
					step_gain_val = "1";
					default_gain = "16"; /* 1.00x */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "2000000"; /* 2.0 fps */
					max_framerate = "130000000"; /* 130 fps */
					step_framerate = "1";
					default_framerate = "130000000"; /* 130 fps */
					min_exp_time = "13"; /* us */
					max_exp_time = "7692"; /* us */
					step_exp_time = "1";
					default_exp_time = "2495"; /* us */

					embedded_metadata_height = "0";
				};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;

						port@0 {
							reg = <0>;
							e3322_csimx307_out0: endpoint {
								port-index = <0>;
								bus-width = <2>;
								remote-endpoint = <&e3322_csi_in0>;
							};
						};
					};
				};
            };

		};
	};
};


/* camera control gpio definitions */
/ {
	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";

		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
#ifndef CSI_ADP
		num_csi_lanes = <12>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <8>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;
#else
		num_csi_lanes = <2>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <8>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;
#endif
		/**
		 * The general guideline for naming badge_info contains 3 parts, and is as follows,
		 * The first part is the camera_board_id for the module; if the module is in a FFD
		 * platform, then use the platform name for this part.
		 * The second part contains the position of the module, ex. “rear” or “front”.
		 * The third part contains the last 6 characters of a part number which is found
		 * in the module's specsheet from the vender.
		 */
		modules {
			module0 {
				badge = "e3322_bottomleft_A815P2";
				position = "bottomleft";
				orientation = "1";
				drivernode0 {
					status = "okay";
					pcl_id = "v4l2_sensor";
					devname = "csx307 30-003b";
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@70/i2c@0/csimx307_a@3b";
				};
				/*drivernode1 {
					pcl_id = "v4l2_lens";
				};*/
			};
		
		};
	};
};

3. tegra194-camera-csimx307-a00.dtsi

/*
 * Top level DTS file for CVM:P2888-0001 and CVB:P2822-0000.
 *
 * Copyright (c) 2017-2019, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 */
#include "common/tegra194-p2888-0001-p2822-0000-common.dtsi"
//#include "common/tegra194-p2822-camera-modules.dtsi"
//#include "t19x-common-modules/tegra194-camera-plugin-manager.dtsi"

#include "common/tegra194-p2822-0000-camera-csimx307-a00.dtsi"
//#include "common/tegra194-p2822-0000-camera-e3326-a00.dtsi"

4. cs_imx307.c

/*
 * veye327.c - veye327 sensor driver
 *
 * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
 * 
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/seq_file.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>

#include <media/tegra_v4l2_camera.h>
#include <media/tegracam_core.h>
#include "cs_imx307.h"

#define CREATE_TRACE_POINTS

/*                                    zp add                                     */
#define label	"imx307: zp: "
#define pri_fmt(fmt) label fmt
#define pri_line() \
	printk(label "func[%s] line[%d]\n", __FUNCTION__, __LINE__)
#define pri_err(fmt, ...) \
	printk(KERN_ERR label "[ERR]: " "func[%s] line[%d]->|ERR| " fmt,\
		 __FUNCTION__, __LINE__, ##__VA_ARGS__)
#define pri_all(fmt, ...) \
	printk(label " func[%s] line[%d]->|| " fmt ,\
		 __FUNCTION__, __LINE__, ##__VA_ARGS__)

#define CSI_ADP 1

/*                                                                               */

//#include <trace/events/veye327.h>

//#define CS307_FUSE_ID_ADDR	0x3382
//#define CS307_FUSE_ID_SIZE	6
//#define CS307_FUSE_ID_STR_SIZE	(CS307_FUSE_ID_SIZE * 2)

/* cs_imx307 sensor register address */
//#define CS307_MODEL_ID_ADDR		0x01


//#define DEBUG_PRINTK
#ifndef DEBUG_PRINTK
#define debug_printk(s , ... )
#define VEYE_TRACE 
#else
#define debug_printk printk
#define VEYE_TRACE printk("%s %s %d \n",__FILE__,__FUNCTION__,__LINE__);
#endif


static const struct of_device_id cs_imx307_of_match[] = {
	{ .compatible = "nvidia,cs_imx307",},
	{ },
};
MODULE_DEVICE_TABLE(of, cs_imx307_of_match);

static const u32 ctrl_cid_list[] = {
	/*TEGRA_CAMERA_CID_GAIN,
	TEGRA_CAMERA_CID_EXPOSURE,
    TEGRA_CAMERA_CID_FRAME_RATE,
	TEGRA_CAMERA_CID_FUSE_ID,
	TEGRA_CAMERA_CID_HDR_EN,*/
	TEGRA_CAMERA_CID_SENSOR_MODE_ID,
};

struct cs_imx307 {
	struct i2c_client	*i2c_client;
	struct v4l2_subdev	*subdev;
	//u8 fuse_id[VEYE327_FUSE_ID_SIZE];
	u32				frame_length;
	s64 last_wdr_et_val;
	struct camera_common_data	*s_data;
	struct tegracam_device		*tc_dev;
    
};

static const struct regmap_config sensor_regmap_config = {
	.reg_bits = 16,
	.val_bits = 8,
	.cache_type = REGCACHE_RBTREE,
	.use_single_rw = true,
};

static inline void cs_imx307_get_frame_length_regs(cs307_reg *regs,
				u32 frame_length)
{
	/*regs->addr = VEYE327_FRAME_LENGTH_ADDR_MSB;
	regs->val = (frame_length >> 16) & 0x01;

	(regs + 1)->addr = VEYE327_FRAME_LENGTH_ADDR_MID;
	(regs + 1)->val = (frame_length >> 8) & 0xff;

	(regs + 2)->addr = VEYE327_FRAME_LENGTH_ADDR_LSB;
	(regs + 2)->val = (frame_length) & 0xff;*/
    VEYE_TRACE
    return ;
}

static inline void cs_imx307_get_coarse_time_regs_shs1(cs307_reg *regs,
				u32 coarse_time)
{
	/*regs->addr = VEYE327_COARSE_TIME_SHS1_ADDR_MSB;
	regs->val = (coarse_time >> 16) & 0x01;

	(regs + 1)->addr = VEYE327_COARSE_TIME_SHS1_ADDR_MID;
	(regs + 1)->val = (coarse_time >> 8) & 0xff;

	(regs + 2)->addr = VEYE327_COARSE_TIME_SHS1_ADDR_LSB;
	(regs + 2)->val = (coarse_time) & 0xff;*/
    VEYE_TRACE
    return ;
}

static inline void cs_imx307_get_coarse_time_regs_shs2(cs307_reg *regs,
				u32 coarse_time)
{
	/*regs->addr = VEYE327_COARSE_TIME_SHS2_ADDR_MSB;
	regs->val = (coarse_time >> 16) & 0x01;

	(regs + 1)->addr = VEYE327_COARSE_TIME_SHS2_ADDR_MID;
	(regs + 1)->val = (coarse_time >> 8) & 0xff;

	(regs + 2)->addr = VEYE327_COARSE_TIME_SHS2_ADDR_LSB;
	(regs + 2)->val = (coarse_time) & 0xff;*/
    VEYE_TRACE
    return;

}

static inline void cs_imx307_get_gain_reg(cs307_reg *regs,
				u8 gain)
{
	/*regs->addr = VEYE327_GAIN_ADDR;
	regs->val = (gain) & 0xff;*/
    VEYE_TRACE
    return;
}

//static int test_mode;
//module_param(test_mode, int, 0644);
static inline int cs_imx307_read_reg(struct camera_common_data *s_data,
				u16 addr, u8 *val)
{
#ifndef CSI_ADP
	int err = 0;
	u32 reg_val = 0;
	err = regmap_read(s_data->regmap, addr, &reg_val);
	*val = reg_val & 0xFF;
    VEYE_TRACE
	return err;
#else
	return 0;
#endif
}

static int cs_imx307_write_reg(struct camera_common_data *s_data,
				u16 addr, u8 val)
{
#ifndef CSI_ADP
	int err;
	struct device *dev = s_data->dev;
	err = regmap_write(s_data->regmap, addr, val);
	if (err)
		dev_err(dev, "%s: i2c write failed, 0x%x = %x\n",
			__func__, addr, val);
    
    VEYE_TRACE
	return err;
#else
	return 0;
#endif
}

static int cs_imx307_write_table(struct cs_imx307 *priv,
				const cs307_reg table[])
{
#ifndef CSI_ADP
	struct camera_common_data *s_data = priv->s_data;
	return regmap_util_write_table_8(s_data->regmap,
					 table,
					 NULL, 0,
					 CS307_TABLE_WAIT_MS,
					 CS307_TABLE_END);
#else
	return 0;
#endif
}

static int cs_imx307_set_group_hold(struct tegracam_device *tc_dev, bool val)
{
	/*struct camera_common_data *s_data = tc_dev->s_data;
	struct device *dev = tc_dev->dev;
	int err;

	err = veye327_write_reg(s_data,
				VEYE327_GROUP_HOLD_ADDR, val);
	if (err) {
		dev_dbg(dev,
			"%s: Group hold control error\n", __func__);
		return err;
	}*/
    VEYE_TRACE
	return 0;
}
#if 0
static int cs_imx307_set_gain(struct tegracam_device *tc_dev, s64 val)
{
    #if 0
	struct camera_common_data *s_data = tc_dev->s_data;
	struct cs_imx307 *priv = (struct cs_imx307 *)tc_dev->priv;
	struct device *dev = tc_dev->dev;
	const struct sensor_mode_properties *mode =
		&s_data->sensor_props.sensor_modes[s_data->mode_prop_idx];
	cs307_reg reg_list[1];
	int err;
	u8 gain;

	/* translate value */
	gain = (u8) (val * 160 / (48 * mode->control_properties.gain_factor));
	dev_dbg(dev, "%s:  gain reg: %d\n",  __func__, gain);

	cs_imx307_get_gain_reg(reg_list, gain);

	err = cs_imx307_write_reg(priv->s_data, reg_list[0].addr,
		 reg_list[0].val);
	if (err)
		goto fail;
    
	return 0;

fail:
	dev_dbg(dev, "%s: GAIN control error\n", __func__);
	return err;
    #endif
    VEYE_TRACE
    return 0;
}

static int cs_imx307_set_coarse_time(struct cs_imx307 *priv, s64 val)
{
    
	struct camera_common_data *s_data = priv->s_data;
	const struct sensor_mode_properties *mode =
		&s_data->sensor_props.sensor_modes[s_data->mode];
	struct device *dev = &priv->i2c_client->dev;
	cs307_reg reg_list[3];
	int err;
	u32 coarse_time_shs1;
	u32 reg_shs1;
	int i = 0;

	coarse_time_shs1 = mode->signal_properties.pixel_clock.val *
		val / mode->image_properties.line_length /
		mode->control_properties.exposure_factor;

	if (priv->frame_length == 0)
		priv->frame_length = CS307_MIN_FRAME_LENGTH;

	reg_shs1 = priv->frame_length - coarse_time_shs1 - 1;

	dev_dbg(dev, "%s: coarse1:%d, shs1:%d, FL:%d\n", __func__,
		 coarse_time_shs1, reg_shs1, priv->frame_length);

	cs_imx307_get_coarse_time_regs_shs1(reg_list, reg_shs1);

	for (i = 0; i < 3; i++) {
		err = cs_imx307_write_reg(priv->s_data, reg_list[i].addr,
			 reg_list[i].val);
		if (err)
			goto fail;
	}

	return 0;

fail:
	dev_dbg(dev, "%s: set coarse time error\n", __func__);
	return err;
    
    VEYE_TRACE
    return 0;
}
#endif
#if 0
static int cs_imx307_set_coarse_time_hdr(struct cs_imx307 *priv, s64 val)
{
	struct device *dev = &priv->i2c_client->dev;
	struct camera_common_data *s_data = priv->s_data;
	const struct sensor_mode_properties *mode =
		&s_data->sensor_props.sensor_modes[s_data->mode];
	cs307_reg reg_list_shs1[3];
	cs307_reg reg_list_shs2[3];
	u32 coarse_time_shs1;
	u32 coarse_time_shs2;
	u32 reg_shs1;
	u32 reg_shs2;
	int err;
	int i = 0;

	if (priv->frame_length == 0)
		priv->frame_length = CS307_MIN_FRAME_LENGTH;

	priv->last_wdr_et_val = val;

	/*WDR, update SHS1 as short ET, and SHS2 is 16x of short*/
	coarse_time_shs1 = mode->signal_properties.pixel_clock.val *
		val / mode->image_properties.line_length /
		mode->control_properties.exposure_factor / 16;
	if (coarse_time_shs1 < CS307_MIN_SHS1_1080P_HDR)
		coarse_time_shs1 = CS307_MIN_SHS1_1080P_HDR;
	if (coarse_time_shs1 > CS307_MAX_SHS1_1080P_HDR)
		coarse_time_shs1 = CS307_MAX_SHS1_1080P_HDR;

	coarse_time_shs2 = (coarse_time_shs1 - CS307_MIN_SHS1_1080P_HDR) * 16 +
				CS307_MIN_SHS2_1080P_HDR;

	reg_shs1 = priv->frame_length - coarse_time_shs1 - 1;
	reg_shs2 = priv->frame_length - coarse_time_shs2 - 1;

	cs_imx307_get_coarse_time_regs_shs1(reg_list_shs1, reg_shs1);
	cs_imx307_get_coarse_time_regs_shs2(reg_list_shs2, reg_shs2);

	dev_dbg(dev, "%s: coarse1:%d, shs1:%d, coarse2:%d, shs2: %d, FL:%d\n",
		__func__,
		 coarse_time_shs1, reg_shs1,
		 coarse_time_shs2, reg_shs2,
		 priv->frame_length);

	for (i = 0; i < 3; i++) {
		err = cs_imx307_write_reg(priv->s_data, reg_list_shs1[i].addr,
			 reg_list_shs1[i].val);
		if (err)
			goto fail;

		err = cs_imx307_write_reg(priv->s_data, reg_list_shs2[i].addr,
			 reg_list_shs2[i].val);
		if (err)
			goto fail;
	}
	return 0;

fail:
	dev_dbg(dev, "%s: set WDR coarse time error\n", __func__);
	return err;
    
    VEYE_TRACE
    return 0;
}


static int cs_imx307_set_frame_rate(struct tegracam_device *tc_dev, s64 val)
{
    //debug_printk("veye327_set_frame_rate want set rate %d\n",val);
    #if 0
	struct camera_common_data *s_data = tc_dev->s_data;
	struct cs_imx307 *priv = (struct cs_imx307 *)tc_dev->priv;
	struct device *dev = tc_dev->dev;
	cs307_reg reg_list[3];
	int err;
	u32 frame_length;
	const struct sensor_mode_properties *mode =
		&s_data->sensor_props.sensor_modes[s_data->mode_prop_idx];
	struct v4l2_control control;
	int hdr_en;
	int i = 0;

	frame_length = mode->signal_properties.pixel_clock.val *
		mode->control_properties.framerate_factor /
		mode->image_properties.line_length / val;

	priv->frame_length = frame_length;
	if (priv->frame_length > CS307_MAX_FRAME_LENGTH)
		priv->frame_length = CS307_MAX_FRAME_LENGTH;

	dev_dbg(dev, "%s: val: %lld, , frame_length: %d\n", __func__,
		val, priv->frame_length);

	cs_imx307_get_frame_length_regs(reg_list, priv->frame_length);

	for (i = 0; i < 3; i++) {
		err = cs_imx307_write_reg(priv->s_data, reg_list[i].addr,
			 reg_list[i].val);
		if (err)
			goto fail;
	}
    
	/* check hdr enable ctrl */
    /*
	control.id = TEGRA_CAMERA_CID_HDR_EN;
	err = camera_common_g_ctrl(s_data, &control);
	if (err < 0) {
		dev_err(dev, "could not find device ctrl.\n");
		return err;
	}

	hdr_en = switch_ctrl_qmenu[control.value];
	if ((hdr_en == SWITCH_ON) && (priv->last_wdr_et_val != 0)) {
		err = cs_imx307_set_coarse_time_hdr(priv, priv->last_wdr_et_val);
		if (err)
			dev_dbg(dev,
			"%s: error coarse time SHS1 SHS2 override\n", __func__);
	}
    */
	return 0;

fail:
	dev_dbg(dev, "%s: FRAME_LENGTH control error\n", __func__);
	return err;
    #endif
    VEYE_TRACE
    return 0;
}

static int cs_imx307_set_exposure(struct tegracam_device *tc_dev, s64 val)
{
    #if 0
	struct camera_common_data *s_data = tc_dev->s_data;
	struct cs_imx307 *priv = (struct cs_imx307 *)tc_dev->priv;
	struct device *dev = tc_dev->dev;
	int err;
	struct v4l2_control control;
	int hdr_en;

	dev_dbg(dev, "%s: val: %lld\n", __func__, val);

	/* check hdr enable ctrl */
	control.id = TEGRA_CAMERA_CID_HDR_EN;
	err = camera_common_g_ctrl(s_data, &control);
	if (err < 0) {
		dev_err(dev, "could not find device ctrl.\n");
		return err;
	}

	hdr_en = switch_ctrl_qmenu[control.value];
	if (hdr_en == SWITCH_ON) {
		err = cs_imx307_set_coarse_time_hdr(priv, val);
		if (err)
			dev_dbg(dev,
			"%s: error coarse time SHS1 SHS2 override\n", __func__);
	} else {
		err = cs_imx307_set_coarse_time(priv, val);
		if (err)
			dev_dbg(dev,
			"%s: error coarse time SHS1 override\n", __func__);
	}

	return err;
    VEYE_TRACE
     #endif
    return 0;
}
#endif
static int cs_imx307_fill_string_ctrl(struct tegracam_device *tc_dev,
				struct v4l2_ctrl *ctrl)
{
    #if 0
	struct cs_imx307 *priv = tc_dev->priv;
	int i;

	switch (ctrl->id) {
	case TEGRA_CAMERA_CID_FUSE_ID:
		for (i = 0; i < CS307_FUSE_ID_SIZE; i++)
			sprintf(&ctrl->p_new.p_char[i*2], "%02x",
				priv->fuse_id[i]);
		break;
	default:
		return -EINVAL;
	}

	ctrl->p_cur.p_char = ctrl->p_new.p_char;
    #endif
    VEYE_TRACE
	return 0;
}

static struct tegracam_ctrl_ops cs_imx307_ctrl_ops = {
	.numctrls = ARRAY_SIZE(ctrl_cid_list),
	.ctrl_cid_list = ctrl_cid_list,
	//.string_ctrl_size = {0, CS307_FUSE_ID_STR_SIZE},
    //delete for jetpack 4.5
	//.set_gain = cs_imx307_set_gain,
	//.set_exposure = cs_imx307_set_exposure,
	//.set_frame_rate = cs_imx307_set_frame_rate,
	.set_group_hold = cs_imx307_set_group_hold,
	.fill_string_ctrl = cs_imx307_fill_string_ctrl,
};

static int cs_imx307_power_on(struct camera_common_data *s_data)
{
	int err = 0;
	struct camera_common_power_rail *pw = s_data->power;
	struct camera_common_pdata *pdata = s_data->pdata;
	struct device *dev = s_data->dev;

	printk("\n");
	pri_line();
    pw->state = SWITCH_ON;
    VEYE_TRACE
	return 0;

	dev_dbg(dev, "%s: power on\n", __func__);
	if (pdata && pdata->power_on) {
		err = pdata->power_on(pw);
		if (err)
		{
			dev_err(dev, "%s failed.\n", __func__);
			pri_err("failed\n");
		}
		else
			pw->state = SWITCH_ON;
		return err;
	}

	/*exit reset mode: XCLR */
	if (pw->reset_gpio) {
#ifndef CSI_ADP
		gpio_set_value(pw->reset_gpio, 0);
		usleep_range(30, 50);
		gpio_set_value(pw->reset_gpio, 1);
		usleep_range(30, 50);
#else	
		pri_all("gpio_set_value(pw->reset_gpio, 1);");
#endif		
	}

	pw->state = SWITCH_ON;
    VEYE_TRACE
	return 0;

}

static int cs_imx307_power_off(struct camera_common_data *s_data)
{
	int err = 0;
	struct camera_common_power_rail *pw = s_data->power;
	struct camera_common_pdata *pdata = s_data->pdata;
	struct device *dev = s_data->dev;

	pri_line();
    pw->state = SWITCH_OFF;
    VEYE_TRACE
	return 0;
    
	dev_dbg(dev, "%s: power off\n", __func__);

	if (pdata && pdata->power_off) {
		err = pdata->power_off(pw);
		if (!err)
			goto power_off_done;
		else
		{
			dev_err(dev, "%s failed.\n", __func__);
			pri_err("failed\n");
		}
		return err;
	}
	/* enter reset mode: XCLR */
	usleep_range(1, 2);
	if (pw->reset_gpio)
#ifndef CSI_ADP		
		gpio_set_value(pw->reset_gpio, 0);
#else
		pri_all("gpio_set_value(pw->reset_gpio, 0);");
#endif

power_off_done:
	pw->state = SWITCH_OFF;
    VEYE_TRACE
	return 0;
}

static int cs_imx307_power_get(struct tegracam_device *tc_dev)
{
	struct device *dev = tc_dev->dev;
	struct camera_common_data *s_data = tc_dev->s_data;
	struct camera_common_power_rail *pw = s_data->power;
	struct camera_common_pdata *pdata = s_data->pdata;
	const char *mclk_name;
	struct clk *parent;
	int err = 0;

	pri_line();
    if(pdata->mclk_name)
    {
        mclk_name = pdata->mclk_name ?
                pdata->mclk_name : "extperiph1";
		//devm_clk_get extperiph1  OK
        pw->mclk = devm_clk_get(dev, mclk_name);
        if (IS_ERR(pw->mclk)) {
            dev_err(dev, "unable to get clock %s\n", mclk_name);
			pri_all("unable to get clock %s\n", mclk_name);
            return PTR_ERR(pw->mclk);
        }

		//devm_clk_get pllp_grtba  ERR
        parent = devm_clk_get(dev, "pllp_grtba");
        if (IS_ERR(parent)){
            dev_err(dev, "devm_clk_get failed for pllp_grtba");
			pri_all("devm_clk_get failed for pllp_grtba");
       	}
        else
            clk_set_parent(pw->mclk, parent);
    }
	pw->reset_gpio = pdata->reset_gpio;

	pw->state = SWITCH_OFF;
    VEYE_TRACE
	return err;
}

static int cs_imx307_power_put(struct tegracam_device *tc_dev)
{
	struct camera_common_data *s_data = tc_dev->s_data;
	struct camera_common_power_rail *pw = s_data->power;

	pri_line();
	if (unlikely(!pw))
		return -EFAULT;
    VEYE_TRACE
	return 0;
}

static struct camera_common_pdata *cs_imx307_parse_dt(struct tegracam_device *tc_dev)
{
	struct device *dev = tc_dev->dev;
	struct device_node *np = dev->of_node;
	struct camera_common_pdata *board_priv_pdata;
	const struct of_device_id *match;
	//struct camera_common_pdata *ret = NULL;
	int err;
	//int gpio;

	if (!np)
		return NULL;

	match = of_match_device(cs_imx307_of_match, dev);
	if (!match) {
		dev_err(dev, "Failed to find matching dt id\n");
		return NULL;
	}

	board_priv_pdata = devm_kzalloc(dev,
					sizeof(*board_priv_pdata), GFP_KERNEL);
	if (!board_priv_pdata)
		return NULL;

	/*gpio = of_get_named_gpio(np, "reset-gpios", 0);
	if (gpio < 0) {
		if (gpio == -EPROBE_DEFER)
			ret = ERR_PTR(-EPROBE_DEFER);
		dev_err(dev, "reset-gpios not found \n");
		goto error;
	}
	board_priv_pdata->reset_gpio = (unsigned int)gpio;*/
    //no reset gpio
    board_priv_pdata->reset_gpio = 0;
    
	err = of_property_read_string(np, "mclk", &board_priv_pdata->mclk_name);
	if (err)
		dev_dbg(dev, "mclk name not present, "
			"assume sensor driven externally\n");

	err = of_property_read_string(np, "avdd-reg",
		&board_priv_pdata->regulators.avdd);
	err |= of_property_read_string(np, "iovdd-reg",
		&board_priv_pdata->regulators.iovdd);
	err |= of_property_read_string(np, "dvdd-reg",
		&board_priv_pdata->regulators.dvdd);
	if (err)
		dev_dbg(dev, "avdd, iovdd and/or dvdd reglrs. not present, "
			"assume sensor powered independently\n");

	board_priv_pdata->has_eeprom =
		of_property_read_bool(np, "has-eeprom");
    VEYE_TRACE
	return board_priv_pdata;

/*error:
	devm_kfree(dev, board_priv_pdata);
	return ret;*/
}

static int cs_imx307_set_mode(struct tegracam_device *tc_dev)
{
	struct cs_imx307 *priv = (struct cs_imx307 *)tegracam_get_privdata(tc_dev);
	struct camera_common_data *s_data = tc_dev->s_data;
	struct device *dev = tc_dev->dev;
	struct device_node *np = dev->of_node;
	bool limit_analog_gain = false;
	const struct of_device_id *match;
	int err;

	match = of_match_device(cs_imx307_of_match, dev);
	if (!match) {
		dev_err(dev, "Failed to find matching dt id\n");
		return -EINVAL;
	}

	limit_analog_gain = of_property_read_bool(np, "limit_analog_gain");
    
	err = cs_imx307_write_table(priv, mode_table[s_data->mode_prop_idx]);
	if (err)
		return err;

	/*if (limit_analog_gain) {
		err = veye327_write_reg(priv->s_data,
			CS307_ANALOG_GAIN_LIMIT_ADDR,
			CS307_ANALOG_GAIN_LIMIT_VALUE);
		if (err)
			return err;
	}*/
    VEYE_TRACE
	return 0;
}

static int cs_imx307_start_streaming(struct tegracam_device *tc_dev)
{
	struct cs_imx307 *priv = (struct cs_imx307 *)tegracam_get_privdata(tc_dev);
	int err;

	/*if (test_mode) {
		err = veye327_write_table(priv,
			mode_table[CS307_MODE_TEST_PATTERN]);
		if (err)
			return err;
	}*/

	pri_line();
	err = cs_imx307_write_table(priv,
		mode_table[CS307_MODE_START_STREAM]);
	if (err)
		return err;
    VEYE_TRACE
	return 0;

}

static int cs_imx307_stop_streaming(struct tegracam_device *tc_dev)
{
	//struct camera_common_data *s_data = tc_dev->s_data;
	struct cs_imx307 *priv = (struct cs_imx307 *)tegracam_get_privdata(tc_dev);
	int err;

	pri_line();

	err = cs_imx307_write_table(priv, mode_table[CS307_MODE_STOP_STREAM]);
	if (err)
		return err;

	/* SW_RESET will have no ACK */
	//veye327_write_reg(s_data, CS307_SW_RESET_ADDR, 0x01);

	/*
	 * Wait for one frame to make sure sensor is set to
	 * software standby in V-blank
	 *
	 * delay = frame length rows * Tline (10 us)
	 */
	usleep_range(priv->frame_length * 10, priv->frame_length * 10 + 1000);
    VEYE_TRACE
	return 0;
}


static struct camera_common_sensor_ops cs_imx307_common_ops = {
	.numfrmfmts = ARRAY_SIZE(cs_imx307_frmfmt),
	.frmfmt_table = cs_imx307_frmfmt,
	.power_on = cs_imx307_power_on,
	.power_off = cs_imx307_power_off,
	.write_reg = cs_imx307_write_reg,	//OK
	.read_reg = cs_imx307_read_reg,		//OK
	.parse_dt = cs_imx307_parse_dt,
	.power_get = cs_imx307_power_get,
	.power_put = cs_imx307_power_put,
	.set_mode = cs_imx307_set_mode,
	.start_streaming = cs_imx307_start_streaming,
	.stop_streaming = cs_imx307_stop_streaming,
};

static int cs_imx307_fuse_id_setup(struct cs_imx307 *priv)
{
    //读一下id试试?
    # if 0
	int err;
	int i;
	struct camera_common_data *s_data = priv->s_data;
	struct device *dev = s_data->dev;
	u8 bak = 0;

	for (i = 0; i < CS307_FUSE_ID_SIZE; i++) {
		err |= cs_imx307_read_reg(s_data,
			CS307_FUSE_ID_ADDR + i, &bak);
		if (!err)
			priv->fuse_id[i] = bak;
		else {
			dev_err(dev, "%s: can not read fuse id\n", __func__);
			return -EINVAL;
		}
	}
    #endif
    VEYE_TRACE
	return 0;
}

static int cs_imx307_board_setup(struct cs_imx307 *priv)
{
	struct camera_common_data *s_data = priv->s_data;
	struct device *dev = s_data->dev;
    struct camera_common_pdata *pdata = s_data->pdata;
	int err = 0;
#ifndef CSI_ADP	
    u8 reg_val[2];
    u16 cameraid = 0;
#endif
	dev_dbg(dev, "%s++\n", __func__);

	err = camera_common_mclk_enable(s_data);
	if (err) {
		dev_err(dev,
			"Error %d turning on mclk\n", err);
		return err;
	}

	err = cs_imx307_power_on(s_data);
	if (err) {
		dev_err(dev,
			"Error %d during power on sensor\n", err);
		return err;
	}

	err = cs_imx307_fuse_id_setup(priv);
	if (err) {
		dev_err(dev,
			"Error %d reading fuse id data\n", err);
		goto err_power_on;
	}
	/* Probe sensor model id registers */
#ifndef CSI_ADP
	err = cs_imx307_read_reg(s_data, PRODUCTID_L, &reg_val[0]);
	if (err) {
		dev_err(dev, "%s: error during i2c read probe (%d)\n",
			__func__, err);
		goto err_reg_probe;
	}
     err = cs_imx307_read_reg(s_data, PRODUCTID_H, &reg_val[1]);
    if (err) {
		dev_err(dev, "%s: error during i2c read probe (%d)\n",
			__func__, err);
		goto err_reg_probe;
	}
    cameraid = ((u16)reg_val[1]<<8) + reg_val[0];
	dev_err(dev,"read sensor id %04x \n", cameraid);
	if (cameraid == CS_MIPI_IMX307) 
    {
        err = 0;
        dev_err(dev, " camera id is cs-mipi-imx307\n");
    }
    else
    {
        err = -ENODEV;
		dev_err(dev, "%s: invalid sensor model id: %d\n",
			__func__, cameraid);
    }
#else
	err = 0;
#endif
	
    VEYE_TRACE
//err_reg_probe:
	cs_imx307_power_off(s_data);

err_power_on:
	if (pdata->mclk_name)
        camera_common_mclk_disable(s_data);

	return err;
}

static int cs_imx307_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);

	dev_dbg(&client->dev, "%s:\n", __func__);
    VEYE_TRACE
	return 0;
}

static const struct v4l2_subdev_internal_ops cs_imx307_subdev_internal_ops = {
	.open = cs_imx307_open,
};

static int cs_imx307_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	struct device *dev = &client->dev;
	struct tegracam_device *tc_dev;
	struct cs_imx307 *priv;
	int err;
	
#ifdef CSI_ADP
	pri_all("\n Probe start\n");
#endif
	
	dev_info(dev, "probing v4l2 sensor\n");
    VEYE_TRACE
	if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
		return -EINVAL;

	priv = devm_kzalloc(dev,
			sizeof(struct cs_imx307), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;
#ifdef CSI_ADP
	else
		pri_all("[OK] - tc_dev\n");
#endif

	tc_dev = devm_kzalloc(dev,
			sizeof(struct tegracam_device), GFP_KERNEL);
	if (!tc_dev)
		return -ENOMEM;
#ifdef CSI_ADP
	else
		pri_all("[OK] - tc_dev\n");
#endif

	priv->i2c_client = tc_dev->client = client;
	tc_dev->dev = dev;
	strncpy(tc_dev->name, "csx307", sizeof(tc_dev->name));
	tc_dev->dev_regmap_config = &sensor_regmap_config;
	tc_dev->sensor_ops = &cs_imx307_common_ops;
	tc_dev->v4l2sd_internal_ops = &cs_imx307_subdev_internal_ops;	//OK
	tc_dev->tcctrl_ops = &cs_imx307_ctrl_ops;	//OK

	err = tegracam_device_register(tc_dev);
	if (err) {
		dev_err(dev, "zp tegra camera driver registration failed %d\n",err);
		return err;
	}
#ifdef CSI_ADP
	else
		pri_all("[OK] - tegracam_device_register\n");
#endif

	priv->tc_dev = tc_dev;
	priv->s_data = tc_dev->s_data;
	priv->subdev = &tc_dev->s_data->subdev;
	tegracam_set_privdata(tc_dev, (void *)priv);

	err = cs_imx307_board_setup(priv);
	if (err) {
		dev_err(dev, "board setup failed\n");
		return err;
	}
#ifdef CSI_ADP
	else
		pri_all("[OK] - cs_imx307_board_setup\n");
#endif

	err = tegracam_v4l2subdev_register(tc_dev, true);
	if (err) {
		dev_err(dev, "tegra camera subdev registration failed\n");
		return err;
	}
#ifdef CSI_ADP
	else
		pri_all("[OK] - tegracam_v4l2subdev_register\n");
#endif

	dev_info(dev, "Detected CS307 sensor\n");
#ifdef CSI_ADP
	pri_all("[OK] - Probe end, OK\n\n");
#endif
	return 0;
}

static int
cs_imx307_remove(struct i2c_client *client)
{
	struct camera_common_data *s_data = to_camera_common_data(&client->dev);
	struct cs_imx307 *priv = (struct cs_imx307 *)s_data->priv;

	tegracam_v4l2subdev_unregister(priv->tc_dev);
	tegracam_device_unregister(priv->tc_dev);
    VEYE_TRACE
	return 0;
}

static const struct i2c_device_id cs_imx307_id[] = {
	{ "csx307", 0 },
	{ }
};

MODULE_DEVICE_TABLE(i2c, cs_imx307_id);

static struct i2c_driver cs_imx307_i2c_driver = {
	.driver = {
		.name = "csx307",
		.owner = THIS_MODULE,
		.of_match_table = of_match_ptr(cs_imx307_of_match),
	},
	.probe = cs_imx307_probe,
	.remove = cs_imx307_remove,
	.id_table = cs_imx307_id,
};

module_i2c_driver(cs_imx307_i2c_driver);

MODULE_DESCRIPTION("Media Controller driver for CSONEPLUS CS-MIPI-IMX307");
MODULE_AUTHOR("xumm@csoneplus.com  Tianjin Zhonganyijia Tech Co.,Ltd.");
MODULE_LICENSE("GPL v2");

5. dmesg


[    1.959033] tegra-i2c 31c0000.i2c: no acknowledge from address 0x50
[    1.959233] i2c i2c-2: Added multiplexed i2c bus 30
[    1.959573] i2c i2c-2: Added multiplexed i2c bus 31
[    1.959895] i2c i2c-2: Added multiplexed i2c bus 32
[    1.960150] i2c i2c-2: Added multiplexed i2c bus 33
[    1.960384] i2c i2c-2: Added multiplexed i2c bus 34
[    1.960718] i2c i2c-2: Added multiplexed i2c bus 35
[    1.960983] i2c i2c-2: Added multiplexed i2c bus 36
[    1.961337] i2c i2c-2: Added multiplexed i2c bus 37
[    1.961347] pca954x 2-0070: registered 8 multiplexed busses for I2C switch pca9548
[    1.962081] imx307: zp:  func[cs_imx307_probe] line[919]->||
                Probe start
[    1.962089] csx307 30-003b: probing v4l2 sensor
[    1.962095] imx307: zp:  func[cs_imx307_probe] line[933]->|| [OK] - tc_dev
[    1.962100] imx307: zp:  func[cs_imx307_probe] line[942]->|| [OK] - tc_dev
[    1.962182] imx307: zp: func[cs_imx307_power_get] line[600]
[    1.962526] csx307 30-003b: devm_clk_get failed for pllp_grtba
[    1.962669] imx307: zp:  func[cs_imx307_power_get] line[617]->|| devm_clk_get failed for pllp_grtba
[    1.962867] csx307 30-003b: tegracam sensor driver:csx307_v2.0.6
[    1.962874] imx307: zp:  func[cs_imx307_probe] line[960]->|| [OK] - tegracam_device_register
[    1.963000] tegra-i2c 31c0000.i2c: no acknowledge from address 0x50

[    1.963341] imx307: zp: func[cs_imx307_power_on] line[514]
[    1.963369] imx307: zp: func[cs_imx307_power_off] line[557]
[    1.963552] imx307: zp:  func[cs_imx307_probe] line[975]->|| [OK] - cs_imx307_board_setup
[    1.963579] imx307: zp:  func[cs_imx307_probe] line[985]->|| [OK] - tegracam_v4l2subdev_register
[    1.963585] csx307 30-003b: Detected CS307 sensor
[    1.963591] imx307: zp:  func[cs_imx307_probe] line[990]->|| [OK] - Probe end, OK

6.dmesg
gst-launch-1.0 nvv4l2camerasrc device=/dev/video0 ! nvvidconv ! xvimagesink


[   78.809038] imx307: zp: func[cs_imx307_power_on] line[514]
[   78.810485] imx307: zp: func[cs_imx307_power_off] line[557]

[   79.543828] imx307: zp: func[cs_imx307_power_on] line[514]
[   79.557207] imx307: zp: func[cs_imx307_start_streaming] line[746]
[   79.603590] [RCE] vi5_hwinit: firmware CL2018101701 protocol version 2.2
[   82.271601] tegra194-vi5 15c10000.vi: no reply from camera processor
[   82.271792] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[   82.271964] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[   82.274789] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback found for msg id: 0x39
[   82.275005] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback found for msg id: 0x41
[   82.275175] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback found for msg id: 0x37
[   82.275356] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[   84.831607] tegra194-vi5 15c10000.vi: no reply from camera processor
[   84.831795] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[   84.831956] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[   84.834702] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[   87.391602] tegra194-vi5 15c10000.vi: no reply from camera processor
[   87.391783] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[   87.391944] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[   87.394477] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[   89.951558] tegra194-vi5 15c10000.vi: no reply from camera processor
[   89.951769] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[   89.951934] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[   89.954726] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[   92.511570] tegra194-vi5 15c10000.vi: no reply from camera processor
[   92.511791] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[   92.511951] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[   92.514733] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[   95.071564] tegra194-vi5 15c10000.vi: no reply from camera processor
[   95.071771] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[   95.071941] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[   95.074638] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[   97.631588] tegra194-vi5 15c10000.vi: no reply from camera processor
[   97.631813] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[   97.631970] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[   97.634848] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[  100.191320] tegra194-vi5 15c10000.vi: no reply from camera processor
[  100.191507] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[  100.191664] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[  100.194776] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[  100.195041] imx307: zp: func[cs_imx307_stop_streaming] line[762]
[  100.204694] imx307: zp: func[cs_imx307_power_off] line[557]

v4l2 dmesg


root@dev:~# cat /etc/nv_tegra_release
# R32 (release), REVISION: 5.1, GCID: 26202423, BOARD: t186ref, EABI: aarch64, DATE: Fri Feb 19 16:50:29 UTC 2021
root@dev:~#
root@dev:~# v4l2-ctl --list-formats-ext
ioctl: VIDIOC_ENUM_FMT
        Index       : 0
        Type        : Video Capture
        Pixel Format: 'UYVY'
        Name        : UYVY 4:2:2
                Size: Discrete 1920x1080
                        Interval: Discrete 0.033s (30.000 fps)
                Size: Discrete 1280x720
                        Interval: Discrete 0.017s (60.000 fps)
                Size: Discrete 640x480
                        Interval: Discrete 0.008s (130.000 fps)

        Index       : 1
        Type        : Video Capture
        Pixel Format: 'VYUY'
        Name        : VYUY 4:2:2
                Size: Discrete 1920x1080
                        Interval: Discrete 0.033s (30.000 fps)
                Size: Discrete 1280x720
                        Interval: Discrete 0.017s (60.000 fps)
                Size: Discrete 640x480
                        Interval: Discrete 0.008s (130.000 fps)

        Index       : 2
        Type        : Video Capture
        Pixel Format: 'NV16'
        Name        : Y/CbCr 4:2:2
                Size: Discrete 1920x1080
                        Interval: Discrete 0.033s (30.000 fps)
                Size: Discrete 1280x720
                        Interval: Discrete 0.017s (60.000 fps)
                Size: Discrete 640x480
                        Interval: Discrete 0.008s (130.000 fps)

        Index       : 3
        Type        : Video Capture
        Pixel Format: 'UYVY'
        Name        : UYVY 4:2:2
                Size: Discrete 1920x1080
                        Interval: Discrete 0.033s (30.000 fps)
                Size: Discrete 1280x720
                        Interval: Discrete 0.017s (60.000 fps)
                Size: Discrete 640x480
                        Interval: Discrete 0.008s (130.000 fps)

        Index       : 4
        Type        : Video Capture
        Pixel Format: 'VYUY'
        Name        : VYUY 4:2:2
                Size: Discrete 1920x1080
                        Interval: Discrete 0.033s (30.000 fps)
                Size: Discrete 1280x720
                        Interval: Discrete 0.017s (60.000 fps)
                Size: Discrete 640x480
                        Interval: Discrete 0.008s (130.000 fps)

root@dev:~# v4l2-ctl --all
Driver Info (not using libv4l2):
        Driver name   : tegra-video
        Card type     : vi-output, csx307 30-003b
        Bus info      : platform:15c10000.vi:0
        Driver version: 4.9.201
        Capabilities  : 0x84200001
                Video Capture
                Streaming
                Extended Pix Format
                Device Capabilities
        Device Caps   : 0x04200001
                Video Capture
                Streaming
                Extended Pix Format
Priority: 2
Video input : 0 (Camera 0: ok)
Format Video Capture:
        Width/Height      : 1920/1080
        Pixel Format      : 'VYUY'
        Field             : None
        Bytes per Line    : 3840
        Size Image        : 4147200
        Colorspace        : sRGB
        Transfer Function : Default (maps to sRGB)
        YCbCr/HSV Encoding: Default (maps to ITU-R 601)
        Quantization      : Default (maps to Limited Range)
        Flags             :

Camera Controls

                    sensor_mode 0x009a2008 (int64)  : min=0 max=0 step=0 default=0 value=0 flags=slider
           sensor_configuration 0x009a2032 (u32)    : min=0 max=0 step=0 default=0 flags=read-only, volatile, has-payload
         sensor_mode_i2c_packet 0x009a2033 (u32)    : min=0 max=0 step=0 default=0 flags=read-only, volatile, has-payload
      sensor_control_i2c_packet 0x009a2034 (u32)    : min=0 max=0 step=0 default=0 flags=read-only, volatile, has-payload
                    bypass_mode 0x009a2064 (intmenu): min=0 max=1 default=0 value=0
                override_enable 0x009a2065 (intmenu): min=0 max=1 default=0 value=0
                   height_align 0x009a2066 (int)    : min=1 max=16 step=1 default=1 value=1
                     size_align 0x009a2067 (intmenu): min=0 max=2 default=0 value=0
               write_isp_format 0x009a2068 (int)    : min=1 max=1 step=1 default=1 value=1
       sensor_signal_properties 0x009a2069 (u32)    : min=0 max=0 step=0 default=0 flags=read-only, has-payload
        sensor_image_properties 0x009a206a (u32)    : min=0 max=0 step=0 default=0 flags=read-only, has-payload
      sensor_control_properties 0x009a206b (u32)    : min=0 max=0 step=0 default=0 flags=read-only, has-payload
              sensor_dv_timings 0x009a206c (u32)    : min=0 max=0 step=0 default=0 flags=read-only, has-payload
               low_latency_mode 0x009a206d (bool)   : default=0 value=0
               preferred_stride 0x009a206e (int)    : min=0 max=65535 step=1 default=0 value=0
                   sensor_modes 0x009a2082 (int)    : min=0 max=30 step=1 default=30 value=3 flags=read-only

Results of boosting the clock appear normal, but the capture results do not change.


root@dev:~# echo 1 > /sys/kernel/debug/bpmp/debug/clk/vi/mrq_rate_locked
root@dev:~# echo 1 > /sys/kernel/debug/bpmp/debug/clk/vi/mrq_rate_locked
root@dev:~# echo 1 > /sys/kernel/debug/bpmp/debug/clk/isp/mrq_rate_locked
root@dev:~# echo 1 > /sys/kernel/debug/bpmp/debug/clk/nvcsi/mrq_rate_locked
root@dev:~#
root@dev:~# cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate |tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
998400000
root@dev:~#
root@dev:~# cat /sys/kernel/debug/bpmp/debug/clk/isp/max_rate | tee  /sys/kernel/debug/bpmp/debug/clk/isp/rate
1190400000
root@dev:~#
root@dev:~# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate
400000000

Running a trace produces a series of failures:

root@dev:~# echo 1 > /sys/kernel/debug/tracing/tracing_on
root@dev:~# echo 30720 > /sys/kernel/debug/tracing/buffer_size_kb
root@dev:~# echo 1 > /sys/kernel/debug/tracing/events/tegra_rtcpu/enable
root@dev:~# echo 1 > /sys/kernel/debug/tracing/events/freertos/enable
root@dev:~# echo 2 > /sys/kernel/debug/camrtc/log-level
root@dev:~# echo 1 > /sys/kernel/debug/tracing/events/camera_common/enable
root@dev:~# echo > /sys/kernel/debug/tracing/trace
root@dev:~# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 33/33   #P:4
#
#                              _-----=> irqs-off
#                             / _----=> need-resched
#                            | / _---=> hardirq/softirq
#                            || / _--=> preempt-depth
#                            ||| /     delay
#           TASK-PID   CPU#  ||||    TIMESTAMP  FUNCTION
#              | |       |   ||||       |         |
     kworker/0:2-1180  [000] ....  2011.311679: rtos_queue_peek_from_isr_failed: tstamp:63213149593 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2011.479641: rtos_queue_peek_from_isr_failed: tstamp:63218149591 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2011.647632: rtos_queue_peek_from_isr_failed: tstamp:63223149602 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2011.759627: rtos_queue_peek_from_isr_failed: tstamp:63228149598 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2011.927639: rtos_queue_peek_from_isr_failed: tstamp:63233149591 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2012.095624: rtos_queue_peek_from_isr_failed: tstamp:63238149593 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2012.263614: rtos_queue_peek_from_isr_failed: tstamp:63243149591 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2012.431597: rtos_queue_peek_from_isr_failed: tstamp:63248149591 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2012.599599: rtos_queue_peek_from_isr_failed: tstamp:63253149595 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2012.715642: rtos_queue_peek_from_isr_failed: tstamp:63258149495 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2012.883674: rtos_queue_peek_from_isr_failed: tstamp:63263149593 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2013.051588: rtos_queue_peek_from_isr_failed: tstamp:63268149594 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2013.219571: rtos_queue_peek_from_isr_failed: tstamp:63273149590 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2013.387558: rtos_queue_peek_from_isr_failed: tstamp:63278149617 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2013.555564: rtos_queue_peek_from_isr_failed: tstamp:63283149595 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2013.723579: rtos_queue_peek_from_isr_failed: tstamp:63288149595 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2013.835557: rtos_queue_peek_from_isr_failed: tstamp:63293149596 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2014.007536: rtos_queue_peek_from_isr_failed: tstamp:63298149593 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2014.175530: rtos_queue_peek_from_isr_failed: tstamp:63303149600 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2014.343568: rtos_queue_peek_from_isr_failed: tstamp:63308149596 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2014.511520: rtos_queue_peek_from_isr_failed: tstamp:63313149598 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2014.679527: rtos_queue_peek_from_isr_failed: tstamp:63318149595 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2014.847504: rtos_queue_peek_from_isr_failed: tstamp:63323149599 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2014.959513: rtos_queue_peek_from_isr_failed: tstamp:63328149591 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2015.127500: rtos_queue_peek_from_isr_failed: tstamp:63333149595 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2015.295504: rtos_queue_peek_from_isr_failed: tstamp:63338149594 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2015.463482: rtos_queue_peek_from_isr_failed: tstamp:63343149593 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2015.631473: rtos_queue_peek_from_isr_failed: tstamp:63348149591 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2015.799479: rtos_queue_peek_from_isr_failed: tstamp:63353149600 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2015.967477: rtos_queue_peek_from_isr_failed: tstamp:63358149612 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2016.079468: rtos_queue_peek_from_isr_failed: tstamp:63363149594 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2016.247456: rtos_queue_peek_from_isr_failed: tstamp:63368149590 queue:0x0bcbcf78
     kworker/0:2-1180  [000] ....  2016.303457: rtos_queue_peek_from_isr_failed: tstamp:63369096330 queue:0x0bcbcf78
  gst-launch-1.0-8925  [002] ....  2469.200982: tegra_channel_open: vi-output, csx307 30-003b
  gst-launch-1.0-8925  [001] ....  2469.208863: tegra_channel_set_power: csx307 30-003b : 0x1
  gst-launch-1.0-8925  [001] ....  2469.208897: camera_common_s_power: status : 0x1
  gst-launch-1.0-8925  [002] ....  2469.216485: tegra_channel_set_power: 15a00000.nvcsi--1 : 0x1
  gst-launch-1.0-8925  [002] ....  2469.216496: csi_s_power: enable : 0x1
 nvv4l2camerasrc-8927  [003] ....  2469.222142: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1080 fmt 12
     kworker/0:1-8757  [000] ....  2469.234747: rtos_queue_peek_from_isr_failed: tstamp:77524429618 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2469.234755: rtcpu_start: tstamp:77524432542
 nvv4l2camerasrc-8927  [001] ....  2469.239805: tegra_channel_set_stream: enable : 0x1
 nvv4l2camerasrc-8927  [001] ....  2469.248109: tegra_channel_set_stream: 15a00000.nvcsi--1 : 0x1
 nvv4l2camerasrc-8927  [001] ....  2469.248112: csi_s_stream: enable : 0x1
 nvv4l2camerasrc-8927  [001] ....  2469.248120: tegra_channel_set_stream: csx307 30-003b : 0x1
     kworker/0:1-8757  [000] ....  2469.290762: rtos_queue_send_from_isr_failed: tstamp:77524558340 queue:0x0bcb41f8
     kworker/0:1-8757  [000] ....  2469.290767: rtos_queue_send_from_isr_failed: tstamp:77524558564 queue:0x0bcb8a60
     kworker/0:1-8757  [000] ....  2469.290768: rtos_queue_send_from_isr_failed: tstamp:77524558786 queue:0x0bcba5e0
     kworker/0:1-8757  [000] ....  2469.290769: rtos_queue_send_from_isr_failed: tstamp:77524559004 queue:0x0bcbb3a0
     kworker/0:1-8757  [000] ....  2469.290770: rtos_queue_send_from_isr_failed: tstamp:77524559222 queue:0x0bcbc160
     kworker/0:1-8757  [000] ....  2469.290772: rtcpu_string: tstamp:77524559882 id:0x04010000 str:"Configuring VI GoS.
"
     kworker/0:1-8757  [000] ....  2469.290805: rtcpu_string: tstamp:77524560151 id:0x04010000 str:"VM GOS[#0] addr=0xc2100000
"
     kworker/0:1-8757  [000] ....  2469.290812: rtcpu_string: tstamp:77524560478 id:0x04010000 str:"VM GOS[#1] addr=0xc2101000
"
     kworker/0:1-8757  [000] ....  2469.290818: rtcpu_string: tstamp:77524560845 id:0x04010000 str:"VM GOS[#2] addr=0xc2102000
"
     kworker/0:1-8757  [000] ....  2469.290847: rtcpu_string: tstamp:77524561159 id:0x04010000 str:"VM GOS[#3] addr=0xc2103000
"
     kworker/0:1-8757  [000] ....  2469.290855: rtcpu_string: tstamp:77524561465 id:0x04010000 str:"VM GOS[#4] addr=0xc2104000
"
     kworker/0:1-8757  [000] ....  2469.290861: rtcpu_string: tstamp:77524561771 id:0x04010000 str:"VM GOS[#5] addr=0xc2105000
"
     kworker/0:1-8757  [000] ....  2469.290867: rtcpu_string: tstamp:77524569845 id:0x04010000 str:"vi5_hwinit: firmware CL2018101701 protocol vers"
     kworker/0:1-8757  [000] ....  2469.290868: rtcpu_string: tstamp:77524570036 id:0x04010000 str:"on 2.2
"
     kworker/0:1-8757  [000] ....  2469.290875: rtos_queue_send_from_isr_failed: tstamp:77524599189 queue:0x0bcb41f8
     kworker/0:1-8757  [000] ....  2469.290875: rtos_queue_send_from_isr_failed: tstamp:77524599414 queue:0x0bcb8a60
     kworker/0:1-8757  [000] ....  2469.290876: rtos_queue_send_from_isr_failed: tstamp:77524599639 queue:0x0bcba5e0
     kworker/0:1-8757  [000] ....  2469.290877: rtos_queue_send_from_isr_failed: tstamp:77524599857 queue:0x0bcbb3a0
     kworker/0:1-8757  [000] ....  2469.290878: rtos_queue_send_from_isr_failed: tstamp:77524600074 queue:0x0bcbc160
     kworker/0:1-8757  [000] ....  2469.290878: rtcpu_string: tstamp:77524601230 id:0x04010000 str:"VI GOS[#0] set to VM GOS[4] base 0xc2104000
"
     kworker/0:1-8757  [000] ....  2469.290884: rtos_queue_send_from_isr_failed: tstamp:77524860887 queue:0x0bcb41f8
     kworker/0:1-8757  [000] ....  2469.290885: rtos_queue_send_from_isr_failed: tstamp:77524861047 queue:0x0bcb8a60
     kworker/0:1-8757  [000] ....  2469.290886: rtos_queue_send_from_isr_failed: tstamp:77524861209 queue:0x0bcba5e0
     kworker/0:1-8757  [000] ....  2469.290887: rtos_queue_send_from_isr_failed: tstamp:77524861366 queue:0x0bcbb3a0
     kworker/0:1-8757  [000] ....  2469.290887: rtos_queue_send_from_isr_failed: tstamp:77524861523 queue:0x0bcbc160
     kworker/0:1-8757  [000] ....  2469.290890: rtcpu_vinotify_event: tstamp:77524882581 tag:RESERVED_18 channel:0x23 frame:0 vi_tstamp:75605590464 data:0x10000000
     kworker/0:1-8757  [000] ....  2469.290890: rtcpu_vinotify_event: tstamp:77524882756 tag:RESERVED_18 channel:0x23 frame:0 vi_tstamp:75605594272 data:0x31000001
     kworker/0:1-8757  [000] ....  2469.290911: rtcpu_vinotify_event: tstamp:77524882930 tag:RESERVED_19 channel:0x23 frame:0 vi_tstamp:75605595264 data:0x07020001
     kworker/0:1-8757  [000] ....  2469.290912: rtcpu_vinotify_event: tstamp:77524883078 tag:RESERVED_18 channel:0x23 frame:0 vi_tstamp:75605652736 data:0x10000000
     kworker/0:1-8757  [000] ....  2469.290913: rtcpu_vinotify_event: tstamp:77524883249 tag:RESERVED_18 channel:0x23 frame:0 vi_tstamp:75605656608 data:0x31000002
     kworker/0:1-8757  [000] ....  2469.402779: rtos_queue_peek_from_isr_failed: tstamp:77529429980 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2469.570776: rtos_queue_peek_from_isr_failed: tstamp:77534429980 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2469.738703: rtos_queue_peek_from_isr_failed: tstamp:77539429980 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2469.906702: rtos_queue_peek_from_isr_failed: tstamp:77544429980 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2470.074691: rtos_queue_peek_from_isr_failed: tstamp:77549429980 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2470.242671: rtos_queue_peek_from_isr_failed: tstamp:77554429980 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2470.354667: rtos_queue_peek_from_isr_failed: tstamp:77559429982 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2470.522655: rtos_queue_peek_from_isr_failed: tstamp:77564429982 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2470.690642: rtos_queue_peek_from_isr_failed: tstamp:77569429982 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2470.858636: rtos_queue_peek_from_isr_failed: tstamp:77574429984 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2471.030673: rtos_queue_peek_from_isr_failed: tstamp:77579429980 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2471.198613: rtos_queue_peek_from_isr_failed: tstamp:77584429980 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2471.366603: rtos_queue_peek_from_isr_failed: tstamp:77589429979 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2471.478599: rtos_queue_peek_from_isr_failed: tstamp:77594429979 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2471.646590: rtos_queue_peek_from_isr_failed: tstamp:77599429979 queue:0x0bcbcf78
     kworker/0:1-8757  [000] ....  2471.814606: rtos_queue_peek_from_isr_failed: tstamp:77604429979 queue:0x0bcbcf78
 vi-output, csx3-8930  [001] ....  2471.921316: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1080 fmt 12
     kworker/0:1-8757  [000] ....  2471.926604: rtos_queue_send_from_isr_failed: tstamp:77608329087 queue:0x0bcb41f8
     kworker/0:1-8757  [000] ....  2471.926610: rtos_queue_send_from_isr_failed: tstamp:77608329268 queue:0x0bcb8a60
     kworker/0:1-8757  [000] ....  2471.926611: rtos_queue_send_from_isr_failed: tstamp:77608329433 queue:0x0bcba5e0
     kworker/0:1-8757  [000] ....  2471.926613: rtos_queue_send_from_isr_failed: tstamp:77608329590 queue:0x0bcbb3a0
     kworker/0:1-8757  [000] ....  2471.926614: rtos_queue_send_from_isr_failed: tstamp:77608329746 queue:0x0bcbc160
     kworker/0:1-8757  [000] ....  2471.926616: rtos_queue_send_from_isr_failed: tstamp:77608395666 queue:0x0bcb41f8
     kworker/0:1-8757  [000] ....  2471.926617: rtos_queue_send_from_isr_failed: tstamp:77608395826 queue:0x0bcb8a60
     kworker/0:1-8757  [000] ....  2471.926618: rtos_queue_send_from_isr_failed: tstamp:77608395989 queue:0x0bcba5e0
     kworker/0:1-8757  [000] ....  2471.926620: rtos_queue_send_from_isr_failed: tstamp:77608396146 queue:0x0bcbb3a0
     kworker/0:1-8757  [000] ....  2471.926621: rtos_queue_send_from_isr_failed: tstamp:77608396303 queue:0x0bcbc160
     kworker/0:1-8757  [000] ....  2471.926622: rtos_queue_send_from_isr_failed: tstamp:77608403520 queue:0x0bcb41f8
     kworker/0:1-8757  [000] ....  2471.926624: rtos_queue_send_from_isr_failed: tstamp:77608403678 queue:0x0bcb8a60
     kworker/0:1-8757  [000] ....  2471.926625: rtos_queue_send_from_isr_failed: tstamp:77608403839 queue:0x0bcba5e0
     kworker/0:1-8757  [000] ....  2471.926626: rtos_queue_send_from_isr_failed: tstamp:77608403996 queue:0x0bcbb3a0
     kworker/0:1-8757  [000] ....  2471.926628: rtos_queue_send_from_isr_failed: tstamp:77608404152 queue:0x0bcbc160


dmesg - after open the trace

[ 2469.216476] imx307: zp: func[cs_imx307_power_on] line[514]
[ 2469.248143] imx307: zp: func[cs_imx307_start_streaming] line[746]
[ 2469.290797] [RCE] Configuring VI GoS.
[ 2469.290809] [RCE] VM GOS[#0] addr=0xc2100000
[ 2469.290816] [RCE] VM GOS[#1] addr=0xc2101000
[ 2469.290822] [RCE] VM GOS[#2] addr=0xc2102000
[ 2469.290852] [RCE] VM GOS[#3] addr=0xc2103000
[ 2469.290858] [RCE] VM GOS[#4] addr=0xc2104000
[ 2469.290865] [RCE] VM GOS[#5] addr=0xc2105000
[ 2469.290872] [RCE] vi5_hwinit: firmware CL2018101701 protocol version 2.2
[ 2469.290882] [RCE] VI GOS[#0] set to VM GOS[4] base 0xc2104000
[ 2471.918590] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 2471.918765] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 2471.918947] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 2471.921671] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 2479.606183] [RCE] Configuring VI GoS.
[ 2479.606194] [RCE] VM GOS[#0] addr=0xc2100000
[ 2479.606200] [RCE] VM GOS[#1] addr=0xc2101000
[ 2479.606206] [RCE] VM GOS[#2] addr=0xc2102000
[ 2479.606212] [RCE] VM GOS[#3] addr=0xc2103000
[ 2479.606218] [RCE] VM GOS[#4] addr=0xc2104000
[ 2479.606224] [RCE] VM GOS[#5] addr=0xc2105000
[ 2482.158024] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 2482.158196] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 2482.158350] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 2482.160755] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 2484.761894] [RCE] Configuring VI GoS.
[ 2484.761914] [RCE] VM GOS[#0] addr=0xc2100000
[ 2484.761922] [RCE] VM GOS[#1] addr=0xc2101000
[ 2484.761928] [RCE] VM GOS[#2] addr=0xc2102000
[ 2484.761934] [RCE] VM GOS[#3] addr=0xc2103000
[ 2484.761940] [RCE] VM GOS[#4] addr=0xc2104000
[ 2484.761946] [RCE] VM GOS[#5] addr=0xc2105000
[ 2487.277711] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 2487.277886] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 2487.278070] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 2487.280650] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 2487.280932] imx307: zp: func[cs_imx307_stop_streaming] line[762]
[ 2487.286004] [RCE] Configuring VI GoS.
[ 2487.286029] [RCE] VM GOS[#0] addr=0xc2100000
[ 2487.286036] [RCE] VM GOS[#1] addr=0xc2101000
[ 2487.286042] [RCE] VM GOS[#2] addr=0xc2102000
[ 2487.286048] [RCE] VM GOS[#3] addr=0xc2103000
[ 2487.286055] [RCE] VM GOS[#4] addr=0xc2104000
[ 2487.286061] [RCE] VM GOS[#5] addr=0xc2105000
[ 2487.300356] imx307: zp: func[cs_imx307_power_off] line[557]

I’m confused to how to look for the problem and solve it.

Thank you.

The trace log shows NVCSI/VI didn’t receive any validate data from MIPI bus.
Also suggest to use v4l2-ctl to capture instead of v4l2src to verify the driver during bring up state.

Hi ShaneCCC
Thank you so much for your repling fast.

The trace log shows NVCSI/VI didn’t receive any validate data from MIPI bus.
→ one time it is OK, But other time it always show green screen. I measure the mipi csi0 2lane singal it is normal. What can i do to confirm if it is my code or devicetree configuration 's fault.

Also suggest to use v4l2-ctl to capture instead of v4l2src to verify the driver during bring up state.
→ the log which using v4l2-ctl

# v4l2-ctl -d /dev/video0 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=test_20210204_1.uyvy --verbose

VIDIOC_QUERYCAP: ok
VIDIOC_S_EXT_CTRLS: ok
VIDIOC_REQBUFS: ok
VIDIOC_QUERYBUF: ok
VIDIOC_QBUF: ok
VIDIOC_QUERYBUF: ok
VIDIOC_QBUF: ok
VIDIOC_QUERYBUF: ok
VIDIOC_QBUF: ok
VIDIOC_QUERYBUF: ok
VIDIOC_QBUF: ok
VIDIOC_STREAMON: ok
        Index    : 0
        Type     : Video Capture
        Flags    : mapped, error
        Field    : None
        Sequence : 0
        Length   : 4147200
        Bytesused: 4147200
        Timestamp: 0.000000s (Monotonic, End-of-Frame)

        Index    : 0
        Type     : Video Capture
        Flags    : mapped, error
        Field    : None
        Sequence : 0
        Length   : 4147200
        Bytesused: 4147200
        Timestamp: 0.000000s (Monotonic, End-of-Frame)

        Index    : 1
        Type     : Video Capture
        Flags    : mapped, error
        Field    : None
        Sequence : 1
        Length   : 4147200
        Bytesused: 4147200
        Timestamp: 0.000000s (Monotonic, End-of-Frame)

        Index    : 2
        Type     : Video Capture
        Flags    : mapped, error
        Field    : None
        Sequence : 2
        Length   : 4147200
        Bytesused: 4147200
        Timestamp: 0.000000s (Monotonic, End-of-Frame)

        Index    : 3
        Type     : Video Capture
        Flags    : mapped, error
        Field    : None
        Sequence : 3
        Length   : 4147200
        Bytesused: 4147200
        Timestamp: 0.000000s (Monotonic, End-of-Frame)

Is it my code fault?
Any help or feedback would be greatly apprecited

zhou

If it can work ever that tell the DTS configure should be fine, suppose it could be sensor output signal timing problem.

the board receive MIPI CSI-2 without I2C from FPGA, not sensor.
will it be affected?

Doesn’t matter FPGA or sensors

If the fpga send the rgb singal to csi, csi should also get the data. i say right?

Yes, if the signal follow the MIPI spec.

Hi shaneCCC

now csi get the fpga singnal - 1920*1080-30Fps, mipi clk=297000000
i am not sure the decivetree configuration is right.
can you help me confirm it?

		csimx307_a@3b {
					devnode = "video0";
					compatible = "nvidia,cs_imx307";
					reg = <0x3b>;

					/* Physical dimensions of sensor */
                    //physical_w = "5.6";
                    //physical_h = "3.1";

					sensor_model = "csimx307";
					use_sensor_mode_id = "false";
					dovdd-supply = <&en_vdd_cam>;
					avdd-reg = "vana";
					dvdd-reg = "vdig";
					iovdd-reg = "dovdd";

					mode0 { /* CS307_MODE_1920X1080_30FPS */
					mclk_khz = "24000";
					num_lanes = "2";
					tegra_sinterface = "serial_a";
					phy_mode = "DPHY";
					discontinuous_clk = "yes";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "1920";
					active_h = "1080";
					pixel_t = "yuv_vyuy16";
					readout_orientation = "0";
					line_length = "2200";
					inherent_gain = "1";
					mclk_multiplier = "2";
					//pix_clk_hz = "74250000";
					pix_clk_hz = "297000000";

					gain_factor = "16";
					framerate_factor = "1000000";
					exposure_factor = "1000000";
					min_gain_val = "16"; /* 1.00x */
					max_gain_val = "170"; /* 10.66x */
					step_gain_val = "1";
					default_gain = "16"; /* 1.00x */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "1000000"; /* 1.0 fps */
					max_framerate = "30000000"; /* 30 fps */
					step_framerate = "1000000";
					default_framerate = "30000000"; /* 30 fps */
					min_exp_time = "13"; /* us */
					max_exp_time = "333333"; /* us */
					step_exp_time = "1";
					default_exp_time = "2495"; /* us */

					embedded_metadata_height = "0";
				};

The pixel_t already deprecated. Use the following properties instead.

•mode_type

•csi_pixel_bit_depth

•pixel_phase

Hi @zp11 ,

My first question is about this:

The trace log shows NVCSI/VI didn’t receive any validate data from MIPI bus.
→ one time it is OK, But other time it always show green screen.

As long as your driver and device tree are setup properly, you will get a green screen when running a compatible gstreamer pipeline when no FPGA or image sensor is connected, and /dev/video0 will always appear in the device tree. Are you saying that you brought up the image successfully one time? Did you do this by running a gstreamer pipeline? Launching Cheese? If this worked, what changed (in SW and/or HW) to break it?

I don’t see any problems with your DTS file outright, but I also know nothing about how you are physically connecting the Jetson to the FGPA. Double check your physical path from FPGA to Jetson. Is it indeed going to MIPI serial_a?

I might also suggest stripping down your configuration to as simple as possible. In my case, I had to revise my DTS to a single-lane MIPI CSI-2 signal to get the image up successfully on the Jetson. This revealed damaged hardware on the FPGA itself, where swapping out the entire FPGA dev board solved the issue. Also, don’t assume that the FPGA design is flawless unless you’ve seen it work on a different image output device.

It also looks like you’ve put a lot of extra features in your code. It appears that you may have based your work on the IMX307 image sensor driver. I might advise going back to the original ov5693 driver (no i2c version) and DTS files if your troubleshooting isn’t getting you closer to the solution, and keeping the code modifications simple until you get the expected output.

Best of luck!

Thanks!
Ian

Hi lan @ian.draney
thank you so much for your replying.
i will follow your advice to check my code and other. Thank you so much.
If later it still cant work well, would you share your code about ov5693 driver(no i2c version) and dts files with me. I’ll try your method again.
Best wishes for you. You are so kind,

Thanks
zhou