Jetson Orin AGX custom board not boot

Hi,
I have the same problem as many users. I have prepared my own board for the Jeston AGX and can’t get it to work.
When designing, we used the Design Guide Jetson_AGX_Orin_Series_Design_Guide_DG-10653-001_v1.6 and the diagram: Jetson_AGX_Orin_DevKit_Carrier_Board_Design_Files_A04_20221003

To start with, let’s discuss the power sequence. I use the minimum possible variant - Auto Power ON. I also don’t have an additional IC, the pins have been routed to our environmental processor, but at this stage I am also trying to manually control these signals.
Startup:


C1: 12V(SYS_VIN_HV),
C2: 5V(SYS_VIN_MV),
C3: MODULE_POWER_ON,
C4: CARRIER_POWER_ON

Current when MODULE_POWER_ON is HIGH:
12V - 0.11A,
5V - 0.25-0.31A,

Tries to approach data from UART port 3 Debug - R120 - but I get no response.

I have come to the conclusion that not using EEPROM I should modify the software. But without that, shouldn’t there be any UART communication?

I also see no sign of communication over the I2C(I2C1) bus, where the memory should be.

How can I do further debugging? I’ve looked through the documentation many times and don’t see any significant differences. The circuit responds to a change in the MODULE_POWER_ON state, but there is no other communication. Should I set any of the other signals accordingly?

To summarize the problems identified:

  1. no UART3 data.
  2. no change in the I2C1 signal(goes high and there is no response)
  3. no HDMI image

Additional measurements:
MODULE_SHDN_N - 1.5V
MODULE_SLEEP_N - 1.8V
SYS_RESET_N - 1.8V
CARRIER_POWER_ON 3.3V

Please help.

I have a Jetson NVIDIA 900-13701-0040-000 module, which runs on the original development board.

  1. What’s the pin status of SYS_RESET_N during power on? It should be released if module power on correctly.
  2. What’s the pin status of straping pins, UART5_TX and UART5_RTS? You can find detail in chapter Strapping Pins in Design Guide. Their status should not be changed during power on.

Thank you for your response.
CH1(Yellow) - MODULE_POWER_ON,
CH2 - SYS_RESET_N,
CH3 - UART5_TX,
CH4 - UART5_RX,

Pin state after stabilization is constant over time…

Should check UART5_RTS, not UART5_RX.

If both UART5_TX and RTS pins status are not affected during power on, then the strapping status has no problem. Then no clue on this. You may need to compare your design to reference based on the checklist sheet attached in the Design Guide doc.

I consider the topic resolved. The problem turned out to be soldered resistors at JTAG, which should not be there for normal operation.

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.