Jetson TK1 disable spread spectrum clocking on PCie

I need to disable the spread spectrum clock on PLLE.
This is for connecting the bord to a PCIe switch that do not support SS clock.

Do anyone have any pointer how to accomplish this ?


diging deeper in the subject

I can disable the SSC clock by setting the CLK_RST_CONTROLLER_PLLE_SS_CNTL_0 register

I also found a driver under kernel/derivers/clk/tegra/clk-pll.c
that include a function to dissable the SSC feature.

I have try to hack the register in u-boot before booting

mw 0x60006086 0x20011C25

But after boot the register dont hold the value. So the register must be modifier during bootup.
My guest is that I must do a special kernel build to achieve what I need.

The probleme is that I dont kwon how to do that. Someone have any idea ?


Are you asking how to recompile the kernel or how to modify the kernel to change the CLK_RST_CONTROLLER_PLLE_SS_CNTL_0 register?

Hi kulve,
I was asking how to modify the kernel to disable the SSC clock before the PCIe device enumeration.

I thing I could handre the kernel recompilation, I just realy dont know where to make the modification.

If you can help it would be great.

thx for your time

Sorry, but I don’t know enough about the topic to advice on that.

I did notice that CLK_RST_CONTROLLER_PLLE_SS_CNTL_0 is used in drivers/ata/ahci-tegra.c, that’s “support for TEGRA AHCI Serial ATA”.

Are you using SATA? If not, maybe you could try disabling that option from the kernel and see if the register is behaving differently?