Jetson TX1 3.3V I2C open-drain requirement

The Jetson TX1 OEM product design guide specifies that the 3.3V I2C busses should use pinctrl to set the pin driver to open-drain when used with 3.3V pull up resistors (pg 54, note 2):

When the device tree is modified to specify that the pins should be set to open-drain:

nvidia,open-drain = <TEGRA_PIN_ENABLE>;

The lines go low and never get pulled back up after the first attempt to communicate with an I2C device.

If the device tree is left unmodified we have found that the I2C signals do not quite meet spec; especially the SCL signal which is never pulled all the way to 0V (typically pulled to ~300mv) and never rises all the way to 3.3V (typically rises to ~2.9V). The edges are relatively clean but the compressed range is a bit worrying and seems contradictory to what the OEM design guide specifies.

Has anyone utilized / probed the 3.3V I2C lines and found their signals were clean & within spec? Can anyone comment on the open-drain configuration and if the OEM design guide is wrong?

Hello, NaterGator:
Would you please try to configure

nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;

in corresponding I2C pins and test it again?



These pins are already specified as io-high-voltage:;a=blob;f=arch/arm64/boot/dts/tegra210-platforms/tegra210-jetson-cv-pinmux-p2597-2180-a00.dtsi;h=5d24d58c172d7d4811f42d067f521067802846fc;hb=l4t/l4t-r24.1#l207

Hi, NateGator,
Can you provide the information in the bottom label of your carrier board? For example: 699-82597-0000-300 E.3


The bottom line of the label on the TX1 module reads “699-82180-1000-100 U”

Hi, NateGator,
Thank you for providing the modul number.
We also need the number of carrier board. It should be 699-82597-xxxx-xxx X.x.

Ah, that would be 699-82597-0000-302 A.