Jetson TX1 and ARM DSTREAM debugger


Is it possible to connect DSTREAM and DS5 to Jetson TX1?

Auto detection is failed with “NO_CORES_FOUND”

Is there predefined Jetson TX1 platform.sdf (System description file)?


Are you trying to use Jetson TX1 as a host or as a target device in this case? Jetson TX1 has JTAG connector to connect to Lauterbach debugger.

Hi chijen!

Jetson TX1 is a target.

I’m trying ARM DSTREAM and DS5. It can connect DAP, read configuration ROM(with warnings) but can not connect to target. Main reason for the thread to find the way of configuration JETSON + DSTREAM + DS5 to debug Jetson.


That is correct. Main issue is to be able to find a way to configure DS5 so it can recognize Jetson TX1 as a target device. Attached is a DS5 debugger configuration file for Jetson TX1 you are familiar with and might find it useful.
JetsonTX1_DS5rvc.txt (73.1 KB)

Hi a.kolotnikov & Chijen,

I’ve been considering to purchase the DSTREAM myself and a DS-5 Ultimate (I think this is the only version that supports TX1 if I’m not mistaken) to be able to debug the Jetson TX1.

I have a few quick question’s:

The file Chijen provided I assume will tell the DSTREAM how to access the cores and Debug Access port which is obviously the first step towards success :-)

But what about some sort of register modelling file? (Like DDF files for IAR if you’re familiar with that which describes all registers, widths and addresses in the chip, so that once inside the IDE, the IDE allows you to view for example the SPI Data register directly without knowing it’s address in memory etc…) do you have something like this?


Thanks for your comment. Understand what you are looking for. NV does not provide that as a convenient debugging file. There is a public TRM that allows any developer to create one and open source it :)

For general debugging need, you should be able to use above file info to enable your bootloader or kernel debugging. Down the road, we will continue to look into DS5 support for Jetson.