Jetson TX2 - INA226 (Power Monitor with i2C Interface)

I wanted to post this just in case anyone needed it or wanted to add information. I’ve been trying to get power measurements from the TX2 and below is what I’ve figured out. This builds on the following post.

https://devtalk.nvidia.com/default/topic/950341/jetson-tx1/jetson-tx1-ina226-power-monitor-with-i2c-interface-/post/4998393/#4998393

On the TX2, i2c addresses are in the following location

/sys/devices/3160000.i2c/i2c-0/0-004*

There should be four 0-0040, 0-0041, 0-0042, and 0-0043.

INA3221 monitors has the same readable sysfs nodes as the TX1. Here are the following rail names.

ubuntu@tegra-ubuntu:~$ cat /sys/devices/3160000.i2c/i2c-0/0-0040/iio_device/rail_name_*
VDD_SYS_GPU
VDD_SYS_SOC
VDD_4V0_WIFI
ubuntu@tegra-ubuntu:~$ cat /sys/devices/3160000.i2c/i2c-0/0-0041/iio_device/rail_name_*
VDD_IN
VDD_SYS_CPU
VDD_SYS_DDR
ubuntu@tegra-ubuntu:~$ cat /sys/devices/3160000.i2c/i2c-0/0-0042/iio_device/rail_name_*
VDD_MUX
VDD_5V0_IO_SYS
VDD_3V3_SYS
ubuntu@tegra-ubuntu:~$ cat /sys/devices/3160000.i2c/i2c-0/0-0043/iio_device/rail_name_*
VDD_3V3_IO_SLP
VDD_1V8_IO
VDD_3V3_SYS_M2

Everything else seems to be pretty similar to the TX1. Hope the helps.

Also, if anyone has any tips on measuring and understanding thermals of the TX2 I’d love to know!

Hi manicely6005,

Thanks for have this information sharing to community.

Actually, at Jetson TX2 OEM Design Guide doc already contains the HW info about power monitor(chapter 3.5), and
we’ll check if need more info in the carrier board specification.

Thanks

How can I read these sysfs nodes without affecting cpu usage too much? How fast can I read them?

Thanks

Hi Amirerfan,

I think it is a tough one to answer. You could try the sampling rate as fast as possible to see if cpu rate is affected.

Hi to everyone. Somebody knows what is the difference between the variables in_power0_input and in_power0_triggered_input?

They have always the same value except in some cases.

The second question is: How long is the discharge time of the INA226?
when kernel stops the INA226 takes about 2 seconds in order to return an “idle” value. I think that this time is too much and it may invalidate a measurement.

With a bash script, with the Jetson in mode nvpmodel m0, I read it 150 times in a second.

Hi Mungio,

How do you measure this idle time?

I do a bash script that reads the value of in_power0_input variable and write a timestamp and the value in a file. Another thread executes the kernel at the same time.

When the GPU is in Idle, the value of the in_power0_input is 229 mW.

At the time 19:33:09.381678301 the kernel starts and the value of in_power0_input grows up.
At the time 19:33:36.141917950 the kernel ends and the value of in_power0_input decreases.

Only a the time 19:33:38.187580226 the value of of in_power0_input is 229 mW again.

So the INA3221 (not 226) takes 2 seconds to return in idle?

There is tons of overhead in running a bash script, and having it open, read, and close the devices for each measurement.
Just call open() on each of the devices, using O_NONBLOCK mode.
Then call read() into a sufficiently large buffer (seems like 32 bytes is plenty) each time you want to read them.

Here is a tool that reads the value a little over 4,000 times per second:

#include <stdio.h>
#include <stdlib.h>
#include <errno.h>
#include <unistd.h>
#include <sys/types.h>
#include <sys/fcntl.h>
#include <time.h>

int main() {
    int fd = open("/sys/devices/3160000.i2c/i2c-0/0-0040/iio_device/in_voltage0_input", O_RDONLY | O_NONBLOCK);
    if (fd < 0) {
        perror("open()");
        exit(1);
    }
    int cnt = 0;
    double sum = 0;
    double start = 0;
    while (true) {
        if (cnt == 0) {
            struct timespec tv;
            clock_gettime(CLOCK_MONOTONIC_RAW, &tv);
            start = tv.tv_sec + tv.tv_nsec * 1e-9;
        }
        char buf[31];
        lseek(fd, 0, 0);
        int n = read(fd, buf, 32);
        if (n > 0) {
            buf[n] = 0;
            char *o = NULL;
            sum += strtod(buf, &o);
            cnt += 1;
        }
        if (cnt >= 1000) {
            struct timespec tv;
            clock_gettime(CLOCK_MONOTONIC_RAW, &tv);
            double end = tv.tv_sec + tv.tv_nsec * 1e-9;
            fprintf(stderr, "Read %d values in %.3f milliseconds\n", cnt, (end - start) * 1000);
            fprintf(stderr, "average value was %.1f\n", sum / cnt);
            cnt = 0;
            sum = 0;
        }
    }
    return 0;
}

Output on my machine:

Read 1000 values in 228.846 milliseconds
average value was 15096.0
Read 1000 values in 231.470 milliseconds
average value was 15096.0
Read 1000 values in 228.912 milliseconds
average value was 15096.0

The problem is not the number of samples read in a second, but that the INA takes 2 seconds to return an idle value when the kernel ends. I think that is related to the INA3221 average mode configuration.

There is a way to change the configuration file of the INA3221 on the Jetson TX2?

If you want to reconfigure ina3221, please take a look at TI’s page.

http://www.ti.com/product/ina3221

I just looked at the Jetson TX2/TX2i OEM PRODUCT DESIGN GUIDE and on section 3.6 (Power & Voltage Monitoring) it just shows two INA3221AIRGVR devices, whereas as @manicely6005 post shows, the board actually seems to have four INA3221AIRGVR devices, am I missing something here or the design guide is in need of a revision?

https://devtalk.nvidia.com/default/topic/1000830/jetson-tx2/jetson-tx2-ina226-power-monitor-with-i2c-interface-/post/5113505/#5113505

Actually there are three power monitors, one in module as showing in OEM DG, two on carrier board which you can find the I2C address and detail circuit design in schematic.

I have one question. What does VDD_SYS_SOC correspond to? Is it voltage corresponding to CPU (ARM and Denver cores) or is it voltage corresponding to CPU + GPU ?

Refer to topic https://devtalk.nvidia.com/default/topic/1032940/jetson-tx2/soc-voltage/post/5255854/#5255854

Hello again! I’m trying to make sense of what rail actually measures what. I read the Jetson TX2/TX2i OEM Product Design Guide, the carrier board schematics and this thread on the forum, but I still have some doubts. If someone could help me out, I’d appreciate!

According to the Jetson TX2/TX2i OEM Product Design Guide table 6 (Internal Power Subsystem Allocation), I’d expect the VDD_CPU to be supplied by the VDD_IN rail, but looking at figures 9 and 10, I got a little confused and I’d like to check if my understanding is correct:

  1. The readings from the SYSFS devs are in mV and mA, right?
  2. Does the VDD_IN rail powers the VDD_SYS_GPU, VDD_SYS_SOC, VDD_4V0_WIFI, VDD_SYS_CPU and VDD_SYS_DDR rails? In other words, a coherent value for the readings would be to sum the other on the other rails and get the power value on the VDD_IN rail?
  3. Is the nominal voltage of the VDD_SYS_GPU 19 V?
  4. Is the nominal voltage of the VDD_SYS_SOC 19 V?
  5. Is the nominal voltage of the VDD_4V0_WIFI 5 V?
  6. Is the nominal voltage of the VDD_SYS_CPU 19 V?
  7. Is the nominal voltage of the VDD_SYS_DDR 5 V?

I’ve created a little SW project on github with the apps I’m using to read the SYSFS devices.

What I could gather so far:

/sys/devices/3160000.i2c/i2c-0/0-0040/iio_device

Location: On the TX2 module.

  • rail_name_0: VDD_SYS_GPU
  • in_voltage0_input: 19136
  • Nominal voltage: 19 V
  • Description: Tegra GPU & SRAM, GPU supply input

rail_name_1: VDD_SYS_SOC
in_voltage1_input: 19144
Nominal voltage: 19 V
Description: VDD_SYS_SOC_IN, SOC supply input.

  • rail_name_2: VDD_4V0_WIFI
  • in_voltage2_input: 4784
  • Nominal voltage: 5 V
  • Description:
/sys/devices/3160000.i2c/i2c-0/0-0041/iio_device/

Location: on the TX2 module.

  • rail_name_0: VDD_IN
  • in_voltage0_input: 19144
  • Nominal voltage: 19 V
  • Description: VDD_IN Supply Monitor. It seems it DOES NOT power the VDD_SYS_CPU and VDD_SYS_GPU.
  • rail_name_1: VDD_SYS_CPU
  • in_voltage1_input: 19128
  • Nominal voltage: 19 V
  • Description: VDD_SYS_CPU_IN (CPU supply input)
  • rail_name_2: VDD_SYS_DDR
  • in_voltage2_input: 4776
  • Nominal voltage: 5 V
  • Description: VDD_5V0_SD0 (DDR supply input)
/sys/devices/3160000.i2c/i2c-0/0-0042/iio_device

Location: on the carrier board

  • rail_name_0: VDD_MUX
  • in_voltage0_input: 19160
  • Nominal voltage: 19 V
  • description: DC Jack to Carrier Board. Powers the VDD_5V0_IO_SYS and VDD_3V3_SYS rails. Does NOT power the VDD_IN rail in the TX2 module.
  • rail_name_1: VDD_5V0_IO_SYS
  • in_voltage1_input: 5000
  • Nominal voltage: 5 V
  • Description: 5V SYSTEM. Powers the VDD_1V8 rail.
  • rail_name_2: VDD_3V3_SYS
  • in_voltage2_input: 3344
  • Nominal voltage: 3.3 V
  • Description: 3V3 SYSTEM. Powers the VDD_3V3_IO_SLP (VDD_3V3_SLP) rail.
/sys/devices/3160000.i2c/i2c-0/0-0043/iio_device

Location: on the carrier board

  • rail_name_0: VDD_3V3_IO_SLP
  • in_voltage0_input: 3344
  • Nominal voltage: 3.3 V
  • Description: 3V3 RUN RAIL. VDD_3V3_SLP on the carrier board schematic. Powers the 3.3V input of the SATA connector, display connector (pin 16), camera expansion (pins 84, 108, 110),2.8 V for the camera.
  • rail_name_1: VDD_1V8_IO
  • in_voltage1_input: 1816
  • Nominal voltage: 1.8 V
  • Description: 1.8V SYSTEM. VDD_1V8 on the carrier board schematic.
  • rail_name_2: VDD_3V3_SYS_M2
  • in_voltage2_input: 3344
  • Nominal voltage: 3.3 V
  • Description: M.2 3.3V. Powers the M.2 connector.

Thanks a lot!!

Hi, table 4 already list the source of each rail, the figure 9/10 show the way of measure each power rail consumption by adding sense resistor into each branch of source rail.

Are we talking about the OEM guide? Because table 4 is Jetson TX2/TX2i Connector (8x50) Pin Out Matrix. I’m using version 20180307.

I didn’t understand what you meant when you say “the figure 9/10 show the way of measure each power rail consumption by adding sense resistor into each branch of source rail”, the sensors on figure 9 and 10 are already placed on the TX2 module, an OEM will not change those (it might however change the ones on the base board).

Again, I still need to know the the answers for:

  1. The readings from the SYSFS devs are in mV and mA, right?
  2. Does the VDD_IN rail powers the VDD_SYS_GPU, VDD_SYS_SOC, VDD_4V0_WIFI, VDD_SYS_CPU and VDD_SYS_DDR rails? In other words, a coherent value for the readings would be to sum the other on the other rails and get the power value on the VDD_IN rail?
  3. Is the nominal voltage of the VDD_SYS_GPU 19 V?
  4. Is the nominal voltage of the VDD_SYS_SOC 19 V?
  5. Is the nominal voltage of the VDD_4V0_WIFI 5 V?
  6. Is the nominal voltage of the VDD_SYS_CPU 19 V?
  7. Is the nominal voltage of the VDD_SYS_DDR 5 V?

Thank you.

Sorry for typo, it is table 6 in OEM DG, the table lists the source of each rail in column ‘source’ and the voltage value of each rail in column ‘V’.

OK, thanks! But that gets to my point. Look at VDD_CPU on table 6, its source is VDD_5V0_SYS and its nominal voltage is 1.0 V. Now look at figure 10, VDD_SYS_CPU_IN source is VDD_IN (which kind of makes sense as I measure 19128 mV on VDD_SYS_CPU). Are VDD_SYS_CPU and VDD_CPU the same rail? I don’t think so. The documentation is really confusing.