Using SPI slave, dmesg prompts spi-tegra124-slave3210000.spi: Reset control is not found. and Exception occurs when using SPI to transmit data exceeding 256 bytes.
jetpack is 5.1.5.
i just changed dts content from compatible= “nvidia, tegra186-spi” to compatible=“nvidia, tegra186-spi-slave”, and reboot in dmesg i found that
[ 2.579726] spi-tegra124-slave 3210000.spi: Adding to iommu group 0
[ 2.584494] spi-tegra124-slave 3210000.spi: Reset control is not found
then i use spi slave to transfer 8192 bytes data,
i first transfer date succeed. while i try transfer data second time it occurs in dmesg
i have used devmem2 to check tegra-gpsdma with “sudo devmem2 0x02600000” and value is 0x400000
[12243.268897] tegra-gpcdma 2600000.dma: slave id already in use
[12243.269119] spi-tegra124-slave 3210000.spi: Not able to get desc for Tx
[12243.269334] spi-tegra124-slave 3210000.spi: Starting tx dma failed, err -5
[12243.269513] spi-tegra124-slave 3210000.spi: spi can not start transfer, err -5
[12243.269725] spi_master spi0: failed to transfer one message from queue
is tegra-gpcdma 2600000.dma wrong?
then i used devmem2 to check tegra-gpsdma with “sudo devmem2 0x02600000” and value is 0x400004
Is it because the original reset control configuration does not match the SPI slave?
and i just changed the compatible in dts file, then dtc this file to dtb.
Hi 18709295167w,
Are you using the devkit or custom board for Xavier NX?
What’s the Jetpack version in use?
It seem you want to use 3210000.spi as SPI slave.
What’s the SPI master device you are connecting with?
Could you share the block diagram of your conenction?
Please share the full device tree and dmesg for further check.
it’s devkit for Xavier nx.
The version of JetPack is 5.1.5.
we used 3230000.spi as master.
spi1 mosi->spi3:mosi, spi1:miso->spi3:miso, spi1:sck->spi3:sck, spi1:cs0->spi3:cs0
spi@3210000 {
compatible = “nvidia,tegra186-spi”;
reg = <0x00 0x3210000 0x00 0x10000>;
interrupts = <0x00 0x24 0x04>;
#address-cells = <0x01>;
#size-cells = <0x00>;
iommus = <0x02 0x20>;
dma-coherent;
dmas = <0x1b 0x0f 0x1b 0x0f>;
dma-names = “rx\0tx”;
spi-max-frequency = <65000000>;
nvidia,clk-parents = “pll_p\0clk_m”;
clocks = <0x04 0x87 0x04 0x66 0x04 0x0e>;
clock-names = “spi\0pll_p\0clk_m”;
resets = <0x04 0x5b>;
reset-names = “spi”;
status = “okay”;
phandle = <0x2df>;
prod-settings {
prod_c_cs0 {
prod = <0x04 0xfff 0x11>;
};
};
spi@0 {
compatible = "tegra-spidev";
reg = <0x00>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x00>;
};
};
spi@1 {
compatible = "tegra-spidev";
reg = <0x01>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x00>;
};
};
};
spi@3230000 {
compatible = “nvidia,tegra186-spi”;
reg = <0x00 0x3230000 0x00 0x10000>;
interrupts = <0x00 0x26 0x04>;
#address-cells = <0x01>;
#size-cells = <0x00>;
iommus = <0x02 0x20>;
dma-coherent;
dmas = <0x1b 0x11 0x1b 0x11>;
dma-names = “rx\0tx”;
spi-max-frequency = <65000000>;
nvidia,clk-parents = “pll_p\0clk_m”;
clocks = <0x04 0x89 0x04 0x66 0x04 0x0e>;
clock-names = “spi\0pll_p\0clk_m”;
resets = <0x04 0x5d>;
reset-names = “spi”;
status = “okay”;
phandle = <0x2e1>;
prod-settings {
prod_c_cs0 {
prod = <0x04 0xfff 0x15>;
};
};
spi@0 {
compatible = "tegra-spidev";
reg = <0x00>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x00>;
};
};
spi@1 {
compatible = "tegra-spidev";
reg = <0x01>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x00>;
};
};
};
sorry, the spi@3210000 dts is wrong, the follow is we used:
spi@3210000 {
compatible = “nvidia,tegra186-spi-slave”;
reg = <0x00 0x3210000 0x00 0x10000>;
interrupts = <0x00 0x24 0x04>;
#address-cells = <0x01>;
#size-cells = <0x00>;
iommus = <0x02 0x20>;
dma-coherent;
dmas = <0x1b 0x0f 0x1b 0x0f>;
dma-names = “rx\0tx”;
spi-max-frequency = <102000000>;
nvidia,clk-parents = “pll_p\0clk_m”;
clocks = <0x04 0x87 0x04 0x66 0x04 0x0e>;
clock-names = “spi\0pll_p\0clk_m”;
resets = <0x04 0x5b>;
reset-names = “spi”;
status = “okay”;
phandle = <0x2df>;
max_transfer_size = <120000>;
prod-settings {
prod_c_cs0 {
prod = <0x04 0xfff 0x11>;
};
};
spi@0 {
compatible = "tegra-spidev";
reg = <0x00>;
// spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x00>;
};
};
spi@1 {
compatible = "tegra-spidev";
reg = <0x01>;
// spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x00>;
};
};
};
Your connection looks good to me.
Are they the default settings?
You can also refer to https://elinux.org/Jetson/L4T/peripheral/#Slave_Mode for how we verify SPI slave on Jetson device.
Please share the full dmesg if you still hit any issue.
we transfered message lowwer than 256 byte data don’t have any mistake，if we transfer date logger than 256 bytes once. we found error in dmesg:
tegra-gpcdma 2600000.dma: slave id already in use
spi-tegra124-slave 3210000.spi: Not able to get desc for Tx
spi-tegra124-slave 3210000.spi: Starting tx dma failed, err -5
spi-tegra124-slave 3210000.spi: spi can not start transfer, err -5
spi_master spi0: failed to transfer one message from queue
yes, it’s default setting and we didn’t modify anything.
And the following is that we use spi slave mode to receive data and occur first error message in dmesg, :
spi_master spi0: transferred[7786] != requested[59520]
spi_master spi0: CMD[33f01827]: Sl M3 CS0 [HHHH] MSB MSb Rx Tx Pa 8b TRANS[00ff1e6a]:BSY I:255 B:7786
FIFO[01840000]:RxF:3 TxE:4 Err RxSTA TxSTADMA[00110000]: RxTr:2 TxTr:2 B:59519
tegra-gpcdma 2600000.dma: DMA pause timed out
spi_master spi0: tx-dma-err [status:81840000]
spi_master spi0: CMD[33f01827]: Sl M3 CS0 [HHHH] MSB MSb Rx Tx Pa 8b TRANS[00ff1e6a]:BSY I:255 B:7786
FIFO[01840000]:RxF:3 TxE:4 Err RxSTA TxSTADMA[00110000]: RxTr:2 TxTr:2 B:59519
spi_master spi0: rx-dma-err [status:81840000]
spi_master spi0: CMD[33f01827]: Sl M3 CS0 [HHHH] MSB MSb Rx Tx Pa 8b TRANS[00ff1e6a]:BSY I:255 B:7786
FIFO[01840000]:RxF:3 TxE:4 Err RxSTA TxSTADMA[00110000]: RxTr:2 TxTr:2 B:59519
spi_master spi0: failed to transfer one message from queue
if we transfer date again, there is other error message:
tegra-gpcdma 2600000.dma: DMA pause timed out
tegra-gpcdma 2600000.dma: slave id already in use
spi-tegra124-slave 3210000.spi: Not able to get desc for Tx
spi-tegra124-slave 3210000.spi: Starting tx dma failed, err -5
spi-tegra124-slave 3210000.spi: spi can not start transfer, err -5
spi_master spi0: failed to transfer one message from queue
how could we solve the DMA pause timed out and the slave id already in use problems？
oh, we transfer large message with read and write in simplex mode without any error rather than in full duplex with error. we could aviod this error.