main platform mode DTB

Hello Sir,

because no EEPROM with my daughter board, I build the main platform mode dts file for it, but there is no device probe print at start, I verified that device can be access by i2cget normally.

static const struct of_device_id tp2854_of_match = {
{ .compatible = “nvidia,tp2854”,},
{ },
};

  1. in tegra186-quill-p3310-1000-a00-00-base.dts

#include <t18x-common-platforms/tegra186-quill-common-p3310-1000-a00.dtsi>
#include <t18x-common-platforms/tegra186-quill-power-tree-p3310-1000-a00-00.dtsi>
/*
#include <t18x-common-platforms/tegra186-quill-camera-modules.dtsi>
*/
#include <t18x-common-platforms/tegra186-quill-camera-tp2854-m00.dtsi>

#include <t18x-common-modules/tegra186-display-e3320-1000-a00.dtsi>

/* comms dtsi file should be included after gpio dtsi file /
#include <t18x-common-platforms/tegra186-quill-comms.dtsi>
#include <t18x-common-plugin-manager/tegra186-quill-p3310-1000-a00-plugin-manager.dtsi>
#include <t18x-common-modules/tegra186-super-module-e2614-p2597-1000-a00.dtsi>
#include <t18x-common-plugin-manager/tegra186-quill-display-plugin-manager.dtsi>
#include <t18x-common-prod/tegra186-priv-quill-p3310-1000-a00-prod.dtsi>
/

#include <t18x-common-plugin-manager/tegra186-quill-camera-plugin-manager.dtsi>
*/

  1. tegra186-quill-camera-tp2854-m00.dtsi

#include <t18x-common-modules/tegra186-camera-tp2854-m00.dtsi>
#include “dt-bindings/clock/tegra186-clock.h”

#define CAM0_RST_L TEGRA_MAIN_GPIO(R, 5)
#define CAM0_PWDN TEGRA_MAIN_GPIO(R, 0)

/* camera control gpio definitions */

/ {
i2c@3180000 {
tp2854_a@44 {
/* Define any required hw resources needed by driver /
/
ie. clocks, io pins, power sources /
/
mclk-index indicates the index of the /
/
mclk-name with in the clock-names array */

		clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
				 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
		clock-names = "extperiph1", "pllp_grtba";
		mclk = "extperiph1";
		clock-frequency = <27000000>;
		reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
		pwdn-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
		vana-supply = <&en_vdd_cam_hv_2v8>;
		vif-supply = <&en_vdd_cam>;
	};
};

gpio@2200000 {
	camera-control-output-low {
		gpio-hog;
		output-low;
		gpios = <CAM0_RST_L 0 CAM0_PWDN 0>;
		label = "cam0-rst", "cam0-pwdn";
	};
};

};

  1. tegra186-camera-tp2854-m00.dtsi

/ {
host1x {
vi@15700000 {
num-channels = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
status = “okay”;
tp2854_vi_in0: endpoint {
status = “okay”;
csi-port = <0>;
bus-width = <4>;
remote-endpoint = <&tp2854_csi_out0>;
};
};
};
};

	nvcsi@150c0000 {
		num-channels = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		channel@0 {
			reg = <0>;
			status = "okay";
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					status = "okay";
					tp2854_csi_in0: endpoint@0 {
						status = "okay";
						csi-port = <0>;
						bus-width = <4>;
						remote-endpoint = <&tp2854_out0>;
					};
				};
				port@1 {
					reg = <1>;
					status = "okay";
					tp2854_csi_out0: endpoint@1 {
						status = "okay";
						remote-endpoint = <&tp2854_vi_in0>;
					};
				};
			};
		};
	};
};
i2c@3180000 {
	tp2854_a@44 {
		compatible = "nvidia, tp2854";
		/* I2C device address */
		reg = <0x44>;

		/* V4L2 device node location */
		devnode = "video0";

		/* Physical dimensions of sensor */
		physical_w = "3.674";
		physical_h = "2.738";

		sensor_model ="tp2854";

		/* Define any required hw resources needed by driver */
		/* ie. clocks, io pins, power sources */
		avdd-reg = "vana";
		iovdd-reg = "vif";
		dvdd-reg = "vdig";

		/* Defines number of frames to be dropped by driver internally after applying */
		/* sensor crop settings. Some sensors send corrupt frames after applying */
		/* crop co-ordinates */
		/*post_crop_frame_drop = "0";*/

		/**
		* A modeX node is required to support v4l2 driver
		* implementation with NVIDIA camera software stack
		*
		* mclk_khz = "";
		* Standard MIPI driving clock, typically 24MHz
		*
		* num_lanes = "";
		* Number of lane channels sensor is programmed to output
		*
		* tegra_sinterface = "";
		* The base tegra serial interface lanes are connected to
		*
		* discontinuous_clk = "";
		* The sensor is programmed to use a discontinuous clock on MIPI lanes
		*
		* dpcm_enable = "true";
		* The sensor is programmed to use a DPCM modes
		*
		* cil_settletime = "";
		* MIPI lane settle time value.
		* A "0" value attempts to autocalibrate based on mclk_multiplier
		*
		*
		*
		*
		* active_w = "";
		* Pixel active region width
		*
		* active_h = "";
		* Pixel active region height
		*
		* pixel_t = "";
		* The sensor readout pixel pattern
		*
		* readout_orientation = "0";
		* Based on camera module orientation.
		* Only change readout_orientation if you specifically
		* Program a different readout order for this mode
		*
		* line_length = "";
		* Pixel line length (width) for sensor mode.
		* This is used to calibrate features in our camera stack.
		*
		* mclk_multiplier = "";
		* Multiplier to MCLK to help time hardware capture sequence
		* TODO: Assign to PLL_Multiplier as well until fixed in core
		*
		* pix_clk_hz = "";
		* Sensor pixel clock used for calculations like exposure and framerate
		*
		*
		*
		*
		* inherent_gain = "";
		* Gain obtained inherently from mode (ie. pixel binning)
		*
		* min_gain_val = ""; (floor to 6 decimal places)
		* max_gain_val = ""; (floor to 6 decimal places)
		* Gain limits for mode
		*
		* min_exp_time = ""; (ceil to integer)
		* max_exp_time = ""; (ceil to integer)
		* Exposure Time limits for mode (us)
		*
		*
		* min_hdr_ratio = "";
		* max_hdr_ratio = "";
		* HDR Ratio limits for mode
		*
		* min_framerate = "";
		* max_framerate = "";
		* Framerate limits for mode (fps)
		*
		* embedded_metadata_height = "";
		* Sensor embedded metadata height in units of rows.
		* If sensor does not support embedded metadata value should be 0.
		*/

		mode0 { // tp2854_MODE_1920X1080
			mclk_khz = "27000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";

			active_w = "1920";
			active_h = "1080";
			pixel_t = "bayer_bggr";
			readout_orientation = "90";
			line_length = "1928";
			inherent_gain = "1";
			mclk_multiplier = "16";
			pix_clk_hz = "207000000";

			min_gain_val = "1.0";
			max_gain_val = "16.0";
			min_hdr_ratio = "1";
			max_hdr_ratio = "1";
			min_framerate = "1.5";
			max_framerate = "30";
			min_exp_time = "16.165";
			max_exp_time = "666637";
			embedded_metadata_height = "1";
		};
		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				tp2854_out0: endpoint {
					csi-port = <0>;
					bus-width = <4>;
					remote-endpoint = <&tp2854_csi_in0>;
				};
			};
		};
	};
};

tegra-camera-platform {
	compatible = "nvidia, tegra-camera-platform";
	/**
	* Physical settings to calculate max ISO BW
	*
	* num_csi_lanes = <>;
	* Total number of CSI lanes when all cameras are active
	*
	* max_lane_speed = <>;
	* Max lane speed in Kbit/s
	*
	* min_bits_per_pixel = <>;
	* Min bits per pixel
	*
	* vi_peak_byte_per_pixel = <>;
	* Max byte per pixel for the VI ISO case
	*
	* vi_bw_margin_pct = <>;
	* Vi bandwidth margin in percentage
	*
	* max_pixel_rate = <>;
	* Max pixel rate in Kpixel/s for the ISP ISO case
	*
	* isp_peak_byte_per_pixel = <>;
	* Max byte per pixel for the ISP ISO case
	*
	* isp_bw_margin_pct = <>;
	* Isp bandwidth margin in percentage
	*/
	num_csi_lanes = <4>;
	max_lane_speed = <1500000>;
	min_bits_per_pixel = <10>;
	vi_peak_byte_per_pixel = <2>;
	vi_bw_margin_pct = <25>;
	max_pixel_rate = <750000>;
	isp_peak_byte_per_pixel = <2>;
	isp_bw_margin_pct = <25>;

	/**
	* The general guideline for naming badge_info contains 3 parts, and is as follows,
	* The first part is the camera_board_id for the module; if the module is in a FFD
	* platform, then use the platform name for this part.
	* The second part contains the position of the module, ex. “rear” or “front”.
	* The third part contains the last 6 characters of a part number which is found
	* in the module's specsheet from the vender.
	*/
	modules {
		module0 {
			badge = "tp2854_front_A6V24";
			position = "rear";
			status = "okay";
			orientation = "1";
			drivernode0 {
				/* Declare PCL support driver (classically known as guid)  */
				pcl_id = "v4l2_sensor";
				devname = "tp2854 2-0044";
				status = "okay";
				/* Declare the device-tree hierarchy to driver instance */
				proc-device-tree = "/proc/device-tree/i2c@3180000/tp2854_a@44";
			};
		};
	};
};

};

You need to remove the plugin manager if for your camera sensor.
Have a check below document and follow “Using Main Platform Device Tree File”

https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%2520Linux%2520Driver%2520Package%2520Development%2520Guide%2Fcamera_sensor_prog.html%23

Hi Sir,

my device output is YUV422 8bit data, I tested csi_pixel_bit_depth = 8/16, both failed, how to set it for YUV mode, thank you!

[ 3.608269] extract_pixel_format: Need to extend formatyuv_uyvy8
[ 3.608274] tp2854 2-0044: Unsupported pixel format
[ 3.608277] tp2854 2-0044: Failed to read mode0 image props
[ 3.608282] tp2854 2-0044: Could not initialize sensor properties.
[ 3.608285] tp2854 2-0044: Failed to initialize tp2854
[ 3.608288] tp2854 2-0044: tegra camera driver registration failed
[ 3.608353] tp2854: probe of 2-0044 failed with error -22

Do you working on r32.1? If not you need modify vi driver to support it.
Have a reference to below topic for YUV sensor bringup. And I the csi_pixel_bit_depth should not the key point. It totally about the kernel sensor driver cause the failed.

https://devtalk.nvidia.com/default/topic/972192
https://devtalk.nvidia.com/default/topic/976709
https://devtalk.nvidia.com/default/topic/977871
https://devtalk.nvidia.com/default/topic/981601

Hi Shane,

Thank you!yes, this issue is fixed by modifying the sensor_common.c & camera_common.c for pixel_fmt.
would you please give me the final location & name that compiled camera drive in media/i2c/…, then I can just update one file to test after modify.

BR

Bob

Not support loadable module for camera driver yet.
Please update the kernel Image to apply your modify.
For r28.x you can update the kernel Image by below command
replace the Image at …/Linux_for_Tegra/kernel/Image
sudo ./flash.sh -r -k kernel jetson-tx2 mmcblk0p1

For r32.1 just copy the Image to the tegra /boot/Image reboot the device to apply it.

thank you, it works for r32.1, but there is a issue with HDMI display, no login image:

[ 10.747584] usb usb1: usb_suspend_both: status 0
[ 10.751731] usb usb2: usb_suspend_both: status 0
[ 13.139437] tegra-xusb 3530000.xhci: entering ELPG
[ 13.142116] tegra-xusb 3530000.xhci: entering ELPG done
[ 14.992322] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 15.076343] gpio tegra-gpio wake18 for gpio=101(M:5)
[ 15.078896] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 15.371967] CPU1: shutdown
[ 15.377433] psci: CPU1 killed.
[ 15.433321] CPU2: shutdown
[ 15.438791] psci: CPU2 killed.
[ 15.472486] mmc0: cqe intr: 0x00004000, but cqe not enabled
[ 15.481200] mmc0: cqe status card side(0), host side(0)
[ 15.966331] tegradc 15210000.nvdisplay: blank - powerdown
[ 16.013740] extcon-disp-state external-connection:disp-state: cable 47 state 0
[ 16.013742] Extcon AUX1(HDMI) disable
[ 16.039154] tegra_nvdisp_handle_pd_disable: Powergated Head2 pd
[ 16.039268] tegra_nvdisp_handle_pd_disable: Powergated Head1 pd
[ 16.039964] tegra_nvdisp_handle_pd_disable: Powergated Head0 pd
[ 16.040427] tegradc 15210000.nvdisplay: unblank
[ 16.045317] tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
[ 16.045452] tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
[ 16.045555] tegra_nvdisp_handle_pd_enable: Unpowergated Head2 pd
[ 16.051280] Parent Clock set for DC plld2
[ 16.059688] tegradc 15210000.nvdisplay: hdmi: tmds rate:594000K prod-setting:prod_c_hdmi_300m_600m
[ 16.061234] tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.
[ 16.061246] tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.
[ 16.107580] extcon-disp-state external-connection:disp-state: cable 47 state 1
[ 16.107582] Extcon AUX1(HDMI) enable
[ 19.437728] tegradc 15210000.nvdisplay: blank - powerdown
[ 19.480353] extcon-disp-state external-connection:disp-state: cable 47 state 0
[ 19.480355] Extcon AUX1(HDMI) disable
[ 19.500062] tegra_nvdisp_handle_pd_disable: Powergated Head2 pd
[ 19.500142] tegra_nvdisp_handle_pd_disable: Powergated Head1 pd
[ 19.502781] tegra_nvdisp_handle_pd_disable: Powergated Head0 pd
[ 19.503036] tegradc 15210000.nvdisplay: unblank
[ 19.507798] tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
[ 19.510510] tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
[ 19.510609] tegra_nvdisp_handle_pd_enable: Unpowergated Head2 pd
[ 19.512032] Parent Clock set for DC plld2
[ 19.519721] tegradc 15210000.nvdisplay: hdmi: tmds rate:594000K prod-setting:prod_c_hdmi_300m_600m
[ 19.521322] tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.
[ 19.521330] tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.
[ 19.565501] extcon-disp-state external-connection:disp-state: cable 47 state 1
[ 19.565508] Extcon AUX1(HDMI) enable
[ 22.891467] tegradc 15210000.nvdisplay: blank - powerdown
[ 22.940088] extcon-disp-state external-connection:disp-state: cable 47 state 0
[ 22.940091] Extcon AUX1(HDMI) disable
[ 22.963010] tegra_nvdisp_handle_pd_disable: Powergated Head2 pd
[ 22.963122] tegra_nvdisp_handle_pd_disable: Powergated Head1 pd
[ 22.966210] tegra_nvdisp_handle_pd_disable: Powergated Head0 pd
[ 22.966336] tegradc 15210000.nvdisplay: unblank
[ 22.971489] tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
[ 22.971592] tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
[ 22.971674] tegra_nvdisp_handle_pd_enable: Unpowergated Head2 pd
[ 22.972990] Parent Clock set for DC plld2
[ 22.984188] tegradc 15210000.nvdisplay: hdmi: tmds rate:594000K prod-setting:prod_c_hdmi_300m_600m
[ 22.985739] tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.
[ 22.985747] tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.
[ 23.031266] extcon-disp-state external-connection:disp-state: cable 47 state 1
[ 23.031270] Extcon AUX1(HDMI) enable
[ 26.362808] tegradc 15210000.nvdisplay: blank - powerdown
[ 26.402623] extcon-disp-state external-connection:disp-state: cable 47 state 0
[ 26.402625] Extcon AUX1(HDMI) disable
[ 26.424580] tegra_nvdisp_handle_pd_disable: Powergated Head2 pd
[ 26.424662] tegra_nvdisp_handle_pd_disable: Powergated Head1 pd
[ 26.425143] tegra_nvdisp_handle_pd_disable: Powergated Head0 pd
[ 26.425232] tegradc 15210000.nvdisplay: unblank
[ 26.425805] tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
[ 26.425889] tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
[ 26.425967] tegra_nvdisp_handle_pd_enable: Unpowergated Head2 pd
[ 26.427205] Parent Clock set for DC plld2
[ 26.434010] tegradc 15210000.nvdisplay: hdmi: tmds rate:594000K prod-setting:prod_c_hdmi_300m_600m
[ 26.435451] tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.
[ 26.435458] tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.
[ 26.473493] extcon-disp-state external-connection:disp-state: cable 47 state 1
[ 26.473495] Extcon AUX1(HDMI) enable
[ 29.798781] tegradc 15210000.nvdisplay: blank - powerdown
[ 29.835665] extcon-disp-state external-connection:disp-state: cable 47 state 0
[ 29.835666] Extcon AUX1(HDMI) disable

Need “export LOCALVERSION=-tegra” for builded customize Image.

https://elinux.org/Jetson_AGX_Xavier/r32.1_patch

thank you very much, it fixed.

hello, there is some error with V4l2 verify.

//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

4l2-compliance SHA: not available, 64 bits

Compliance test for device /dev/video0:

Drive[ 51.611446] Internal error: Attempting to execute userspace memory: 86000005 [#1] PREEMPT SMP
[ 51.623016] Modules linked in: nvs_bmi160 nvs bcmdhd cfg80211 nvgpu bluedroid_pm ip_tables x_tables
[ 51.632144] CPU: 0 PID: 7321 Comm: v4l2-compliance Not tainted 4.9.140-tegra #11
[ 51.639526] Hardware name: quill (DT)
[ 51.643181] task: ffffffc1b8d81c00 task.stack: ffffffc1cb6fc000
[ 51.649090] PC is at 0x0
[ 51.651622] LR is at tegracam_s_ctrl+0x27c/0x310
[ 51.656230] pc : [<0000000000000000>] lr : [] pstate: 60400145
[ 51.663609] sp : ffffffc1cb6ffa40
[ 51.666916] x29: ffffffc1cb6ffa40 x28: 0000000000000000
[ 51.672238] x27: ffffffc1ebbc8030 x26: 0000000000000000
[ 51.677559] x25: 0000000000000001 x24: 0000000000000001
[ 51.682880] x23: ffffffc1e54ff818 x22: ffffff8009f7f090
[ 51.688200] x21: ffffffc1ebff8f18 x20: ffffffc1ebff8100
[ 51.693520] x19: ffffffc1ebff8100 x18: 0000000000000001
[ 51.698838] x17: 0000000000000002 x16: 0000000000000000
[ 51.704156] x15: ffffffffffffffff x14: ffffffc1cb6ffa20
[ 51.709475] x13: ffffffc1cb6ff925 x12: 0000000000000020
[ 51.714793] x11: ffffffc1cb6ff8e0 x10: ffffffc1cb6ff8e0
[ 51.720113] x9 : 0000000000000002 x8 : 0000000000000002
[ 51.725432] x7 : ffffff8008fa6dc8 x6 : 0000000000000090
[ 51.730749] x5 : 000000000000008d x4 : 0000000000000001
[ 51.736070] x3 : 0000000000000000 x2 : 0000000000000000
[ 51.741388] x1 : 0000000000000000 x0 : ffffffc1ebff8f18
[ 51.746707]
[ 51.748195] Process v4l2-compliance (pid: 7321, stack limit = 0xffffffc1cb6fc000)
[ 51.755663] Call trace:
[ 51.758104] [< (null)>] (null)
[ 51.762803] [] try_or_set_cluster+0x170/0x368
[ 51.768712] [] set_ctrl+0xe8/0x138
[ 51.773666] [] v4l2_s_ctrl+0x8c/0xf0
[ 51.778793] [] v4l_s_ctrl+0xa4/0x110
[ 51.783922] [] __video_do_ioctl+0x204/0x2c8
[ 51.789656] [] video_usercopy+0x2a0/0x6a0
[ 51.795218] [] video_ioctl2+0x3c/0x50
[ 51.800434] [] v4l2_ioctl+0x88/0x118
[ 51.805565] [] do_vfs_ioctl+0xb0/0x8d8
[ 51.810866] [] SyS_ioctl+0x8c/0xa8
[ 51.815824] [] el0_svc_naked+0x34/0x38
[ 51.821126] —[ end trace 1a2ff3ec5846a672 ]—
r Info:
Driver name : tegra-video
Card type : vi-output, tp2854 2-0044
Bus info : platform:15700000.vi:0
Driver version : 4.9.140
Capabilities : 0x84200001
Video Capture
Streaming
Extended Pix Format
Device Capabilities
Device Caps : 0x04200001
Video Capture
Streaming
Extended Pix Format
Media Driver Info:
Driver name : tegra-vi4
Model : NVIDIA Tegra Video Input Device
Serial :
Bus info :
Media version : 0.1.0
Hardware revision: 0x00000003 (3)
Driver version : 0.0.0
Interface Info:
ID : 0x03000008
Type : V4L Video
Entity Info:
ID : 0x00000006 (6)
Name : vi-output, tp2854 2-0044
Function : V4L2 I/O
Pad 0x01000007 : Sink
Link 0x0200000c: from remote pad 0x1000003 of entity ‘150c0000.nvcsi–1’: Data, Enabled

Required ioctls:
test MC information (see ‘Media Driver Info’ above): OK
test VIDIOC_QUERYCAP: OK

Allow for multiple opens:
test second /dev/video0 open: OK
test VIDIOC_QUERYCAP: OK
test VIDIOC_G/S_PRIORITY: OK
test for unlimited opens: OK

Debug ioctls:
test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
test VIDIOC_LOG_STATUS: OK

Input ioctls:
test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
test VIDIOC_ENUMAUDIO: OK (Not Supported)
test VIDIOC_G/S/ENUMINPUT: OK
test VIDIOC_G/S_AUDIO: OK (Not Supported)
Inputs: 1 Audio Inputs: 0 Tuners: 0

Output ioctls:
test VIDIOC_G/S_MODULATOR: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_ENUMAUDOUT: OK (Not Supported)
test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
test VIDIOC_G/S_AUDOUT: OK (Not Supported)
Outputs: 0 Audio Outputs: 0 Modulators: 0

Input/Output configuration ioctls:
test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
test VIDIOC_G/S_EDID: OK (Not Supported)

Control ioctls (Input 0):
test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
test VIDIOC_QUERYCTRL: OK
[ 91.493568] ifidx:0 DHCP - REQUEST [RX]
[ 91.599199] ifidx:0 DHCP - REQUEST [RX]
[ 95.481284] ifidx:0 DHCP - REQUEST [RX]
[ 95.686128] ifidx:0 DHCP - REQUEST [RX]

tp2854.c (14 KB)
tp2854_mode_tbls.h (2.59 KB)
tp2854.h (1.96 KB)

Would you compare with ov5693 to check if any function not implement except fuseid and eeprom. For the gain/exposure/framerate just return as dummy function.

static const u32 ctrl_cid_list[] = {
        TEGRA_CAMERA_CID_GAIN,
        TEGRA_CAMERA_CID_EXPOSURE,
        TEGRA_CAMERA_CID_EXPOSURE_SHORT,
        TEGRA_CAMERA_CID_FRAME_RATE,
        TEGRA_CAMERA_CID_GROUP_HOLD,
        TEGRA_CAMERA_CID_HDR_EN,
        TEGRA_CAMERA_CID_EEPROM_DATA,
        TEGRA_CAMERA_CID_OTP_DATA,
        TEGRA_CAMERA_CID_FUSE_ID,
};

I re-build the driver based on ov5693,it will display below error.
[ 3.685864] i2c /dev entries driver
[ 3.689416] tp2854 2-0044: probing v4l2 sensor.
[ 3.689725] tp2854 2-0044: tegracam sensor driver:tp2854_v2.0.6
[ 3.691061] tp2854 2-0044: ctrl Gain range update failed
[ 3.691066] tp2854 2-0044: Error -34 updating mode specific control ranges
[ 3.691070] tp2854 2-0044: Error -34 updating control ranges
[ 3.691077] tp2854 2-0044: Failed to init ctrls tp2854
[ 3.691081] tp2854 2-0044: tegra camera subdev registration failed
[ 3.691182] tp2854: probe of 2-0044 failed with error -34
tp2854.c (31.6 KB)
tp2854.h (5.25 KB)

@bding
For the control range you can just make it as dummy function due YUV sensor doesn’t have gain control.
Those error are from print out from your driver you need to solve it by yourself.

Hi Shane, I see, but this “ctrl Gain range update failed” is not print from driver, the only possible is in update_ctrl_range, it is remarked and not called by set_gain, only called by set_frame_rate and stop_streaming, so would you please give some guide, thank you!

// if (__v4l2_ctrl_modify_range(ctrl, min, max, 1, def))
// dev_err(dev, “ctrl %x: range update failed\n”,

That’s impossible the log show it print out by “tp2854”
You may not update the kernel Image well.

I add the print that confirmed it is from tegracam_v4l2subdev_register in probe, but not sure why:

dev_info(dev, "debug in.\n");
err = tegracam_v4l2subdev_register(tc_dev, true);
dev_info(dev, "debug out.\n");
if (err) {
	dev_err(dev, "tegra camera subdev registration failed\n");
	return err;
}

static struct tegracam_ctrl_ops tp2854_ctrl_ops = {
.numctrls = ARRAY_SIZE(ctrl_cid_list),
.ctrl_cid_list = ctrl_cid_list,
.string_ctrl_size = {TP2854_EEPROM_STR_SIZE,
TP2854_FUSE_ID_STR_SIZE,
TP2854_OTP_STR_SIZE},
.set_gain = tp2854_set_gain,
.set_exposure = tp2854_set_exposure,
.set_exposure_short = tp2854_set_exposure_short,
.set_frame_rate = tp2854_set_frame_rate,
.set_group_hold = tp2854_set_group_hold,
.fill_string_ctrl = tp2854_fill_string_ctrl,
};

static int tp2854_set_group_hold(struct tegracam_device *tc_dev, bool val)
{

return 0;

}

static int tp2854_set_gain(struct tegracam_device *tc_dev, s64 val)
{

return 0;

}

static int tp2854_set_frame_rate(struct tegracam_device *tc_dev, s64 val)
{

return 0;

}

static int tp2854_set_exposure(struct tegracam_device *tc_dev, s64 val)
{

return 0;

}

static int tp2854_set_exposure_short(struct tegracam_device *tc_dev, s64 val)
{

return 0;

}

[ 3.628683] tp2854 2-0044: probing TP v4l2 sensor.
[ 3.629006] tp2854 2-0044: tegracam sensor driver:tp2854_v2.0.6
[ 3.629582] tp2854 2-0044: debug in.
[ 3.630334] tp2854 2-0044: ctrl Gain range update failed
[ 3.630340] tp2854 2-0044: Error -34 updating mode specific control ranges
[ 3.630343] tp2854 2-0044: Error -34 updating control ranges
[ 3.630357] tp2854 2-0044: Failed to init ctrls tp2854
[ 3.630360] tp2854 2-0044: debug out.
[ 3.630364] tp2854 2-0044: tegra camera subdev registration failed

Hi SHane, I found the issue caused by DTB, we need provide the full parameter even not using in YUV device.

Hi Shane, there is three fail when V4l2 verify, what caused such issue possiblly, thank you for guide!

bob@bob-desktop:~/v4l-utils-1.16.6$ v4l2-compliance -d /dev/video0
v4l2-compliance SHA: not available, 64 bits

Compliance test for device /dev/video0:

Driver Info:
Driver name : tegra-video
Card type : vi-output, tp2854 2-0044
Bus info : platform:15700000.vi:0
Driver version : 4.9.140
Capabilities : 0x84200001
Video Capture
Streaming
Extended Pix Format
Device Capabilities
Device Caps : 0x04200001
Video Capture
Streaming
Extended Pix Format
Media Driver Info:
Driver name : tegra-vi4
Model : NVIDIA Tegra Video Input Device
Serial :
Bus info :
Media version : 0.1.0
Hardware revision: 0x00000003 (3)
Driver version : 0.0.0
Interface Info:
ID : 0x03000008
Type : V4L Video
Entity Info:
ID : 0x00000006 (6)
Name : vi-output, tp2854 2-0044
Function : V4L2 I/O
Pad 0x01000007 : Sink
Link 0x0200000c: from remote pad 0x1000003 of entity ‘150c0000.nvcsi–1’: Data, Enabled

Required ioctls:
test MC information (see ‘Media Driver Info’ above): OK
test VIDIOC_QUERYCAP: OK

Allow for multiple opens:
test second /dev/video0 open: OK
test VIDIOC_QUERYCAP: OK
test VIDIOC_G/S_PRIORITY: OK
test for unlimited opens: OK

Debug ioctls:
test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
test VIDIOC_LOG_STATUS: OK

Input ioctls:
test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
test VIDIOC_ENUMAUDIO: OK (Not Supported)
test VIDIOC_G/S/ENUMINPUT: OK
test VIDIOC_G/S_AUDIO: OK (Not Supported)
Inputs: 1 Audio Inputs: 0 Tuners: 0

Output ioctls:
test VIDIOC_G/S_MODULATOR: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_ENUMAUDOUT: OK (Not Supported)
test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
test VIDIOC_G/S_AUDOUT: OK (Not Supported)
Outputs: 0 Audio Outputs: 0 Modulators: 0

Input/Output configuration ioctls:
test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
test VIDIOC_G/S_EDID: OK (Not Supported)

Control ioctls (Input 0):
test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
test VIDIOC_QUERYCTRL: OK
test VIDIOC_G/S_CTRL: OK
test VIDIOC_G/S/TRY_EXT_CTRLS: OK
test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
Standard Controls: 1 Private Controls: 16

Format ioctls (Input 0):
fail: v4l2-test-formats.cpp(273): duplicate format 59565955 (UYVY)
test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: FAIL
fail: v4l2-test-formats.cpp(1190): ret && node->has_frmintervals
test VIDIOC_G/S_PARM: FAIL
test VIDIOC_G_FBUF: OK (Not Supported)
test VIDIOC_G_FMT: OK
test VIDIOC_TRY_FMT: OK
test VIDIOC_S_FMT: OK
test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
test Cropping: OK (Not Supported)
test Composing: OK (Not Supported)
test Scaling: OK (Not Supported)

Codec ioctls (Input 0):
test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
test VIDIOC_G_ENC_INDEX: OK (Not Supported)
test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)

Buffer ioctls (Input 0):
fail: v4l2-test-buffers.cpp(522): q.create_bufs(node, 1, &fmt) != EINVAL
test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: FAIL
test VIDIOC_EXPBUF: OK

Total: 44, Succeeded: 41, Failed: 3, Warnings: 0

The first and second FAIL should harmless, not sure the latest one.
Have a check if v4l2-ctl can capture. Please modify the width, height, pixelformat for your case.

v4l2-ctl -d /dev/video0 --set-fmt-video=width=1920,height=1080,pixelformat=RG10 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=t.raw

Hi Shane, thank you, it print as below:

Opening in BLOCKING MODE
VIDIOC_QUERYCAP: ok
VIDIOC_S_EXT_CTRLS: ok
VIDIOC_G_FMT: ok
VIDIOC_S_FMT: ok
Format Video Capture:
Width/Height : 1920/1080
Pixel Format : ‘UYVY’ (UYVY 4:2:2)
Field : None
Bytes per Line : 3840
Size Image : 4147200
Colorspace : sRGB
Transfer Function : Default (maps to sRGB)
YCbCr/HSV Encoding: Default (maps to ITU-R 601)
Quantization : Default (maps to Limited Range)
Flags :
[ 1859.633933] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 1859.640446] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[ 1859.650793] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC0 = 0x00000004
[ 1859.659533] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x00000004
[ 1859.667381] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x00000004
[ 1859.901951] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 1859.908495] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[ 1859.919969] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC0 = 0x00000004
[ 1859.928889] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x00000004
[ 1859.936819] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x00000004
[ 1860.165946] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11