Thank you for answer.
If I have more questions,
Looking at the dtsi file(l4t-4.9-t18x-quill/tegra186-quill-p3310-1000-c03-00-base-hdmi2csi.dts at 6509ea9a0677063fac7e7936040cff6c47ddbcaa · InES-HPMM/l4t-4.9-t18x-quill · GitHub) of TS358840 of TX2,
port-index = <0>;
bus-width = <8>;
It is set as above.
Then the CSI configuration seems to consist of the following content:
4 lane (CSI_A+CSI_B), 4 lane (CSI_C+CSI_D)
How is it structured if it is the same in NANO?
NANO is not sequential in the CSI alphabet.
TX2 - ABCDEF
NANO - ABEFCD
If the contents of TC358840 (gang mode AKA combine?) are configured like TX2, how is it configured in NANO?
- 4 lane (CSI_A+CSI_B), 4 lane (CSI_E+CSI_F)
- 4 lane (CSI_A+CSI_B), 4 lane (CSI_C+CSI_D)
Thank you for your interest.