NANO CSI-2 8 lane configuration

Autonomous Machines Jetson & Embedded Systems Jetson Nano
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1

Hello,

I want to configure CSI 8 line in NANO.
I am referring to the documentation. ( Jetson Nano Product Design Guide)

If I refer to “Figure 8-3. CSI Connection Options” and write the code at dtsi file.

port-index = <0>;
bus-width = <8>;

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How is the CSI 8 line structured?

  1. CSI_A + CSI_B + CSI_E + CSI_F
  2. CSI_A + CSI_B + CSI_C + CSI_D

Thank you.

5

Sorry to tell Jetson device not support 8 lanes configure.

6

Isn’t that possible in NANO as in TX2’s TC358840?

7

It’s gang mode AKA combine two source to a frame instead of really 8 lanes configure.
It’s 2 source of 4 lanes configure actually for the tc358840.

8

Okay.
Thank you for answer.

If I have more questions,
Looking at the dtsi file(https://github.com/InES-HPMM/l4t-4.9-t18x-quill/blob/6509ea9a0677063fac7e7936040cff6c47ddbcaa/kernel-dts/tegra186-quill-p3310-1000-c03-00-base-hdmi2csi.dts) of TS358840 of TX2,

port-index = <0>;
bus-width = <8>;

It is set as above.

Then the CSI configuration seems to consist of the following content:
4 lane (CSI_A+CSI_B), 4 lane (CSI_C+CSI_D)

How is it structured if it is the same in NANO?
NANO is not sequential in the CSI alphabet.
TX2 - ABCDEF
NANO - ABEFCD

pic
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If the contents of TC358840 (gang mode AKA combine?) are configured like TX2, how is it configured in NANO?

  1. 4 lane (CSI_A+CSI_B), 4 lane (CSI_E+CSI_F)
  2. 4 lane (CSI_A+CSI_B), 4 lane (CSI_C+CSI_D)

Thank you for your interest.

9

Must be 2

1 Like
10

Thank you for answer.