nvcsi UI value

Hi All,

While going through the NVCSI_PHY_0_NVCSI_CIL_A_CONTROL_0 register in parker_TRM document, there is a field called ‘THS_SETTLE’ in the register.

it is given in description of THS_SETTLE field as,
Settle time for data lane when moving from LP to HS (LP11->LP01->LP00), this setting determines how
many LP clock cycles (204 MHz lp clock cycles) to wait, after LP00, before starting to look at the data. 85ns + 6 * UI < (Ths-
settle-programmed + 6) * lp clock periods < 145ns + 10 * UI

What is UI(unit interval) ?
How to calculate this value ?

thanks in advance…

It’s period of mipi clock. If MIPI clock is445500Hz, then the period is 1/445500=2.2446689 ns

Thanks for the reply shaneCCC

Our resolution is 1920x1080p60. For this Pixel clock is 148500000.

Both pixel clock and mipi clock are same or not…?

No, they are different things.

Thanks for the fast response shaneCCC.

For NVCSI controller, How to calculate mipi clock and pixel clock ?


Any comments ?

MIPI clock is controlled by sensor you have to check with sensor vendor.