how to tune MIPI CSI-2 Rx timing?

hi

trying to attach new GMSL camera on Tx2.

i checked max9286 mipi output signal is ok

but it is not working(preview)

tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11

I think I should adjust the timing on the receiving side(Jetson Tx2 VI4 Block).

kernel-4.4/drivers/media/platform/tegra/camera/csi/csi4_registers.h

#define NVCSI_CIL_A_CONTROL         0x5c
#define NVCSI_CIL_B_CONTROL         0xc0
#define DEFAULT_DESKEW_COMPARE              (0x4 << 20)
#define DEFAULT_DESKEW_SETTLE               (0x6 << 16)
#define DEFAULT_CLK_SETTLE                  (0x21 << 8)
#define T18X_BYPASS_LP_SEQ          (0x1 << 7)
#define DEFAULT_THS_SETTLE                  (0x14 << 0)    //<<<<<==== is it right?

kernel-4.4/drivers/media/platform/tegra/camera/csi/csi4_fops.c

static void csi4_phy_config(
    struct tegra_csi_channel *chan, int csi_port,
    int csi_lanes, bool enable)

	/* setup settle time */
        csi4_phy_write(chan, phy_num,
            NVCSI_CIL_A_CONTROL,
            DEFAULT_DESKEW_COMPARE | DEFAULT_DESKEW_SETTLE |
            DEFAULT_CLK_SETTLE |
            T18X_BYPASS_LP_SEQ | DEFAULT_THS_SETTLE);

In the past, It seems to have been set(T18X_BYPASS_LP_SEQ on Jetson Tx1). So it seems to have worked normally.
So i try tuning DEFAULT_THS_SETTLE.

Can i set/get NVCSI_CIL_A_CONTROL register during operation(linux shell)?

i don’t know access register on shell so i rebuild kernel and reboot.
It is very difficult

Could you give me good solution MPIP timing tune?

Help ME Plz

@walterkim
I’m sorry to tell current didn’t have any convenient way to change the value dynamically.

change DEFAULT_THS_SETTLE value dynamically ???

is it right?

so i found NVIDIA JETSON TX1 MIPI DSI/CSI DESIGN AND TUNING document.

devmem2 seems to be very usefull…

change DEFAULT_THS_SETTLE value dynamically ???

is it right?

@walterkim
Yes, it’s the DEFAULT_THS_SETTLE you can try modify this to find a proper value for your sensor.

DEFAULT_THS_SETTLE value change is no effect.

i think first frame captured…??

Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.323674] tegra-vi4 15700000.vi: Create Surface with imgW=1280, imgH=720, memFmt=203
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.337880] tegra_mipi_cal 3990000.mipical: tegra_mipi_bias_pad_enable
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.339045] nvcsi 150c0000.nvcsi: csi port:0
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.339052] tegra_mipi_cal 3990000.mipical: tegra_mipi_calibration
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.339200] nvcsi 150c0000.nvcsi: csi4_start_streaming ports index=0, lanes=4
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.339205] nvcsi 150c0000.nvcsi: csi4_stream_init
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.339216] nvcsi 150c0000.nvcsi: csi4_stream_config
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.339224] nvcsi 150c0000.nvcsi: csi4_stream_config (0) read VC0_DPCM_CTRL = 00000000
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.339227] nvcsi 150c0000.nvcsi: csi4_phy_config
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.339233] nvcsi 150c0000.nvcsi: NVCSI_CIL_CONFIG = 00000000
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.370569] tegra-vi4 15700000.vi: Status: 4 channel:00 frame:00A4
Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.376883] tegra-vi4 15700000.vi: timestamp sof 45969461056 eof 45998501440 data 0x02d00040

Nov 9 11:09:34 tegra-ubuntu kernel: [ 36.386415] tegra-vi4 15700000.vi: capture_id 1 stream 0 vchan 0
Nov 9 11:09:35 tegra-ubuntu kernel: [ 36.793613] falcon 15340000.vic: runtime suspending
Nov 9 11:09:35 tegra-ubuntu kernel: [ 37.337621] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
Nov 9 11:09:36 tegra-ubuntu kernel: [ 38.341643] tegra-vi4 15700000.vi: ATOMP_FE syncpt timeout!
Nov 9 11:09:36 tegra-ubuntu kernel: [ 38.347876] tegra_mipi_cal 3990000.mipical: tegra_mipi_bias_pad_disable
Nov 9 11:09:36 tegra-ubuntu kernel: [ 38.348578] nvcsi 150c0000.nvcsi: csi4_stop_streaming ports index=0, lanes=4
Nov 9 11:09:36 tegra-ubuntu kernel: [ 38.348585] nvcsi 150c0000.nvcsi: csi4_phy_config
Nov 9 11:09:36 tegra-ubuntu kernel: [ 38.348592] nvcsi 150c0000.nvcsi: NVCSI_CIL_CONFIG = 00000004
Nov 9 11:09:36 tegra-ubuntu kernel: [ 38.348602] nvcsi 150c0000.nvcsi: csi4_stream_check_status
Nov 9 11:09:36 tegra-ubuntu kernel: [ 38.348614] nvcsi 150c0000.nvcsi: csi4_cil_check_status 275
Nov 9 11:09:37 tegra-ubuntu kernel: [ 38.849637] tegra-vi4 15700000.vi: runtime suspending
Nov 9 11:09:37 tegra-ubuntu kernel: [ 38.849669] nvcsi 150c0000.nvcsi: runtime suspending

@walterkim
Did you get any further on this? Are you using the MAX9286 Evaluation Kit or other board/hw?
I’m really interested in getting GMSL to work on the TX2

Hi,

We are using the MAX9286, you can check the components that we used here:

https://devtalk.nvidia.com/default/topic/1020737/jetson-tx2/ov10635-image-sensor-on-tx2/post/5223791/#5223791

-David